SCHS158F November   1998  – March 2022 CD54HC173 , CD54HCT173 , CD74HC173 , CD74HCT173

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics
    6. 5.6 Prerequisite For Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • J|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

2 Description

The CDx4HC173 and CDx4HCT173 contains four independent D-type flip-flops with shared clock (CP), reset (MR), and data enable (E1, E2) pins.

Device Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
CD54HC173F CDIP (16) 21.34 mm × 6.92 mm
CD54HCT173F3A CDIP (16) 21.34 mm × 6.92 mm
CD74HC173E PDIP (16) 19.31mm × 6.35 mm
CD74HCT173E PDIP (16) 19.31mm × 6.35 mm
CD74HC173M SOIC (16) 9.90 mm × 3.90 mm
CD74HCT173M SOIC (16) 9.90 mm × 3.90 mm
CD74HC173PW TSSOP (16) 5.00 mm × 4.40 mm
(1) For all packages see the orderable addendum at the end of the data sheet..
GUID-20220301-SS0I-LCZL-M4DJ-9WMCV52P26BH-low.gif Functional Block Diagram