SCHS130D August 1997 – May 2021 CD54HC20 , CD74HC20
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
This device contains two independent 4-input NAND gates. Each gate performs the Boolean function Y = A ● B ● C ● D in positive logic.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
CD74HC20M | SOIC (14) | 8.70 mm × 3.90 mm |
CD74HC20E | PDIP (14) | 19.30 mm × 6.40 mm |
CD54HC20F | CDIP (14) | 21.30 mm × 7.60 mm |