SCHS168E November   1998  – March 2022 CD54HC243 , CD74HC243 , CD74HCT243

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • J|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Switching Characteristics

Input tt = 6ns. Unless otherwise specified, CL = 50pF
PARAMETER VCC (V) 25°C -40°C to 85°C -55°C to 125°C UNIT
TYP MAX MAX MAX
HC TYPES
tpd Propagation delay data to outputs 2 90 115 135 ns
4.5 7(1) 18 23 27
6 15 20 23
tPZL, tPZH Output high-Z, to high level to low level 2 150 190 225 ns
4.5 12(1) 30 38 45
6 26 33 38
tPHZ, tPLZ Output high level, output low level to high-Z 2 150 190 225 ns
4.5 12(1) 30 38 45
6 26 33 38
tt Output transition times 2 60 75 90 ns
4.5 12 15 18
6 10 13 15
Ci Input capacitance 10 10 10 pF
CO Three-state output capacitance 20 20 20 pF
Cpd(2)(3) Power dissipation capacitance 5 80 pF
HCT TYPES
tpd Propagation delay data to outputs 4.5 9(1) 22 28 33 ns
tPZH, tPLZ Output high-Z to high level to low level 4.5 14(1) 34 43 51 ns
tPHZ, tPLZ Output high level, output low level to high-Z 4.5 14(1) 35 44 53 ns
tt Output transition times 4.5 12 15 18 ns
Ci Input capacitance 10 10 10 pF
CO Three-state output capacitance 20 20 20 pF
Cpd(2)(3) Power dissipation capacitance 5 91 pF
(1) Typical value tested at 5V, CL = 15pF.
(2) CPD is used to determine the dynamic power consumption, per channel.
(3) PD = VCC2fi (CPD + CL) where fi = Input Frequency, fO = Output Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.