SCHS122N November   1997  – April 2024 CD54HC4051 , CD54HC4052 , CD54HC4053 , CD54HCT4051 , CD74HC4051 , CD74HC4052 , CD74HC4053 , CD74HCT4051 , CD74HCT4052 , CD74HCT4053

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Thermal Information
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Electrical Characteristics: HC Devices
    6. 5.6  Electrical Characteristics: HCT Devices
    7. 5.7  Switching Characteristics, VCC = 5V
    8. 5.8  Switching Characteristics, CL = 50pF
    9. 5.9  Analog Channel Specifications
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • J|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2 Functional Block Diagrams

GUID-1D2AE83C-C37B-498D-828A-44A55E6FA88D-low.gif
All inputs are protected by standard CMOS protection network.
Figure 7-1 CDx4HCx4051 Functional Block Diagram
GUID-BE418BF2-6ED7-4FC1-9303-901072E72FF4-low.gif
All inputs are protected by standard CMOS protection network.
Figure 7-2 CDx4HCx4052 Functional Block Diagram
GUID-B75AC991-4320-4972-82A2-C463BA0D3AB2-low.gif
All inputs are protected by standard CMOS protection network.
Figure 7-3 CDx4HCx4053 Functional Block Diagram