SCHS239D November   1998  – May 2024 CD54AC161 , CD74AC161

PRODUCTION DATA  

  1.   1
  2. Features
  3. Description
  4. Pin Configuration and Functions
  5. Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Timing Requirements
    7. 4.7 Switching Characteristics
    8. 4.8 Timing Diagrams
    9. 4.9 Operating Characteristics
  6. Parameter Measurement Information
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
  9. Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • N|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
TA = 25°C –55°C to 125°C –40°C to 85°C UNIT
MIN MAX MIN MAX MIN MAX
VCC Supply voltage 1.5 5.5 1.5 5.5 1.5 5.5 V
VIH High-level input voltage VCC = 1.5 1.2 1.2 1.2 V
VCC = 3 2.1 2.1 2.1
VCC = 5.5 3.85 3.85 3.85
VIL Low-level input voltage VCC = 1.5 V 0.3 0.3 0.3 V
VCC = 3 V 0.9 0.9 0.9
VCC = 5.5 V 1.65 1.65 1.65
VI Input voltage 0 VCC 0 VCC 0 VCC V
VO Output voltage 0 VCC 0 VCC 0 VCC V
IOH High-level output current VCC = 4.5 V to 5.5 V –24 –24 –24 mA
IOL Low-level output current VCC = 4.5 V to 5.5 V 24 24 24
Δt/Δv Input transition rise or fall rate VCC = 1.5 V to 3 V 50 50 50 ns/V
VCC = 3.6 V to 5.5 V 20 20 20
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004).