SCHS346C April   2003  – October 2024 CD74AC174

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Application
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements, VCC = 1.5 V
    7. 5.7  Timing Requirements, VCC = 3.3 V ± 0.3 V
    8. 5.8  Timing Requirements, VCC = 5 V ± 0.5 V
    9. 5.9  Switching Characteristics, VCC = 1.5 V
    10. 5.10 Switching Characteristics, VCC = 3.3 V ± 0.3 V
    11. 5.11 Switching Characteristics, VCC = 5 V ± 0.5 V
    12. 5.12 Operating Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Power Supply Recommendations
    2. 8.2 Layout
      1. 8.2.1 Layout Guidelines
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support (Analog)
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • BQB|16
  • PW|16
  • N|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.8 Timing Requirements, VCC = 5 V ± 0.5 V

over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted)
–55°C to 125°C –40°C to 85°C UNIT
MIN MAX MIN MAX
fclock Clock frequency 95 108 MHz
tw Pulse duration CLR low 4 3.5 ns
CLK high or low 5.2 4.6
tsu Setup time before CLK↑ Data 2 2 ns
th Hold time, data after CLK ↑ 3 2.6 ns
trec Recovery time, before CLK ↑ CLR↑ 1.5 1.5 ns