SCHS246A August   1998  – August 2024 CD74AC251

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Thermal Information
    4. 4.4 Electrical Characteristics
    5. 4.5 Switching Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Functional Block Diagram
    2. 6.2 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Links
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|16
Thermal pad, mechanical data (Package|Pins)

2 Description

The CD74AC251 8-input multiplexers that utilize the Harris Advanced CMOS Logic technology. This multiplexer features both true (Y) and complement (Y) outputs as well as an Output Enable (OE) input. The OE must be at a LOW logic level to enable this device. When the OE input is HIGH, both outputs are in the high-impedance state. When enabled, address information on the data select inputs determines which data input is routed to the Y and Y outputs.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE(3)
CD74AC251 D (SOIC, 16) 9.9mm × 6mm 9.9mm × 3.9mm
(1) For more information, see Section 10.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
(3) The body size (length × width) is a nominal value and does not include pins.
CD74AC251 Functional DiagramFunctional Diagram