SCHS249C November   1998  – May 2024 CD54AC273 , CD54ACT273 , CD74AC273 , CD74ACT273

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3  Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Prerequisite for Switching Function
    7. 4.7 Switching Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • N|20
  • DW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4.7 Switching Characteristics

Input tr, tf = 3ns, CL = 50pF (Worst Case)
PARAMETER VCC (V) -40°C TO 85°C -55°C TO 125°C UNITS
MIN TYP MAX MIN TYP MAX
AC TYPES
tPLH, tPHL Propagation Delay, CP to Qn 1.5 - - 154 - - 169 ns
3.3 (1) 4.9 - 17.2 4.7 - 18.9 ns
5 (2) 3.5 - 12.3 3.4 - 13.5 ns
tPLH, tPHL Propagation Delay, MR to Qn 1.5 - - 154 - - 169 ns
3.3 4.9 - 17.2 4.7 - 18.9 ns
5 3.5 - 12.3 3.4 - 13.5 ns
CI Input Capacitance - - - 10 - - 10 pF
CPD (3) Power Dissipation Capacitance - - 45 - - 45 - pF
ACT TYPES
tPLH, tPHL Propagation Delay, CP to Qn 5(2) 3.5 - 12.3 3.4 - 13.5 ns
tPLH, tPHL Propagation Delay, MR to Qn 5 3.5 - 12.3 3.4 - 13.5 ns
CI Input Capacitance - - - 10 - - 10 pF
CPD q(3) Power Dissipation Capacitance - - 45 - - 45 - pF
(2) 3.3V Min is at 3.6V, Max is at 3V.
(3) 5V Min is at 5.5V, Max is at 4.5V.
(4) CPD is used to determine the dynamic power consumption per flip-flop.
Note:

AC: PD = CPD VCC 2 fi = ∑ (CL VCC 2 fo)

ACT: PD = CPD VCC 2 fi + ∑ (CL VCC 2 fo) + VCC ΔICC where fi = input frequency, fo = output frequency, CL = output load capacitance, VCC = supply voltage.