SCLS579B April   2004  – April 2020 CD74HC125-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Functional pinout of the CD74HC125-Q1
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS 3-State Outputs
      2. 8.3.2 Standard CMOS Inputs
      3. 8.3.3 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

D or PW Package
14-Pin SOIC or TSSOP
Top View
CD74HC125-Q1 hc125-pw-pinout-oen-high.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
1OE 1 Input Channel 1, Output Enable, Active Low
1A 2 Input Channel 1, Input A
1Y 3 Output Channel 1, Output Y
2OE 4 Input Channel 2, Output Enable, Active Low
2A 5 Input Channel 2, Input A
2Y 6 Output Channel 2, Output Y
GND 7 — Ground
3Y 8 Output Channel 3, Output Y
3A 9 Input Channel 3, Input A
3OE 10 Input Channel 3, Output Enable, Active Low
4Y 11 Output Channel 4, Output Y
4A 12 Input Channel 4, Input A
4OE 13 Input Channel 4, Output Enable, Active Low
VCC 14 — Positive Supply