SCHS168E November   1998  – March 2022 CD54HC243 , CD74HC243 , CD74HCT243

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • N|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Parameter Measurement Information

tPD is the maximum between tPLH and tPHL

tt is the maximum between tTLH and tTHL

GUID-284FFFE1-2D63-4116-90D9-781883ECEB88-low.pngFigure 6-1 HC and HCT transition times and propagation delay times, combination logic
GUID-F4D8C957-B294-4779-9342-507120CD7DC9-low.pngFigure 6-3 HC three-state propagation delay waveform
GUID-21DFB3D6-E4A1-4D73-B716-D09E91B6416F-low.png

NOTE: Open drain waveforms tPLZ and tPZL are the same as those for three-state shown on the left. The test circuit is Output RL = 1kΩ to VCC, CL = 50pF.

Figure 6-5 HC and HCT three-state propagation delay test circuit
GUID-5A057181-2BF3-4E8D-82D5-719CD09D1FA5-low.pngFigure 6-2 HCT transition times and tpopationg delay times, combination logic
GUID-F8DF428A-529F-4A16-B226-7BE4DFD6DC70-low.pngFigure 6-4 HCT three-state propagation delay waveform