SCLS552B December   2003  – April 2024 CD74HC4051-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Recommended Operating Area as a Function of Supply Voltages
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics
    6. 5.6 Operating Characteristics
    7. 5.7 Analog Channel Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Device Functional Modes
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

This device is a digitally controlled analog switch that utilizes silicon-gate CMOS technology to achieve operating speeds similar to LSTTL, with the low power consumption of standard CMOS integrated circuits.

This analog multiplexer/demultiplexer controls analog voltages that may vary across the voltage supply range (for example, VCC to VEE). These bidirectional switches allow any analog input to be used as an output and vice versa. The switches have low ON resistance and low OFF leakages. In addition, the device has an enable control (E) that, when high, disables all switches to their OFF state.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
CD74HC4051-Q1PW (TSSOP, 16)5mm × 6.4mm
D (SOIC, 16)9.9mm × 3.9mm
(1) For more information see, Section 10
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
GUID-7F55178D-D194-46F3-BC49-79BA8053290B-low.png Logic Diagram (Positive Logic)