SCLS552B December   2003  – April 2024 CD74HC4051-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Recommended Operating Area as a Function of Supply Voltages
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics
    6. 5.6 Operating Characteristics
    7. 5.7 Analog Channel Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Device Functional Modes
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Parameter Measurement Information

GUID-C3C52223-BB81-494B-A502-406D521ED6D0-low.pngFigure 6-1 Frequency-Response Test Circuit
GUID-3ADE9CF7-DC63-48DE-9972-2990BA03E1F1-low.pngFigure 6-3 Control to Switch Feed-through Noise Test Circuit
GUID-3E4D339C-A559-4508-8E48-5E1F52DBC7AD-low.pngFigure 6-2 Sine-Wave Distortion Test Circuit
GUID-332BFC66-683F-4B3D-B320-4A8C784CBD8F-low.pngFigure 6-4 Switch off Signal Feed-through Test Circuit
GUID-20231102-SS0I-ZQ6X-HCL9-W0V3ZCZGBS1H-low.jpg
A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1MHz, ZO = 50Ω, tr = 6 ns, tf = 6 ns.
D. For clock inputs, fmax is measured with the input duty cycle at 50%.
E. The outputs are measured one at a time with one input transition per measurement.
F. tPLZ and tPHZ are the same as tdis.
G. tPZL and tPZH are the same as ten.
H. tPLH and tPHL are the same as tpd.
Figure 6-5 Load Circuit and Voltage Waveforms