SCHS134G February   1998  – October 2022 CD54HC73 , CD74HC73 , CD74HCT73

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings (1)
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Specifications
    5. 5.5 Prerequisite for Switching Specifications
    6. 5.6 Switching Specifications
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • N|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

2 Description

The ’HC73 and CD74HCT73 utilize silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.

Package Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
CD74HC73M SOIC (14) 8.65 mm × 3.90 mm
CD74HCT73M SOIC (14) 8.65 mm × 3.90 mm
CD74HC73E PDIP (14) 19.31 mm × 6.35 mm
CD74HCT73E PDIP (14) 19.31 mm × 6.35 mm
CD54HC73F CDIP (14) 19.55 mm × 6.71 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-20210913-SS0I-LGRN-VFBZ-JKKGMT22BFWV-low.pngFunctional Block Diagram