SNAS818B July 2021 – May 2022 CDCDB800
PRODUCTION DATA
The CDCDB800 has an SMBus interface that is active only when CKPWRGD_PD# = 1. The SMBus allows individual enable/disable of each output.
When CKPWRGD_PD# = 0, the SMBus pins are placed in a Hi-Z state, but all register settings are retained. The SMBus register values are only retained while VDD remains inside of the recommended operating voltage.