SNAS734F July 2017 – January 2024 CDCI6214
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
fO_HCSL | Output frequency | 0.1 | 350 | MHz | ||
VCM_HCSL | Output common mode | 0.2 | 0.34 | 0.55 | V | |
VOD | Differential output voltage | fO_HCSL = 100 MHz | 0.4 | 1.0 | V | |
VSS | Differential output voltage, peak to peak | fO_HCSL = 100 MHz | 0.8 | 2.0 | Vpp | |
VCROSS | Absolute crossing point | Rp = 49.9 Ω ±5%, fO_HCSL = 100 MHz | 250 | 550 | mV | |
ΔVCROSS | Relative crossing point variation | w.r.t to average crossing point, fO_HCSL = 100 MHz | 100 | mV | ||
dV/dt | Slew rate for rising and falling edge | Differential, at VCROSS ±150 mV, fO_HCSL = 100 MHz (1) | 1 | 4 | V/ns | |
ΔdV/dt | Slew rate matching | Single-ended, at VCROSS ±75 mV, fO_HCSL = 100 MHz (1) | 20% | |||
ODC | Output duty cycle | Not in PLL bypass mode | 45% | 55% | ||
RP | Parallel termination | Rp = 49.9 Ω ±5% required | 45 | 55 | Ω | |
LHCSL_100M | Phase noise floor, single side band | fCARRIER = 100 MHz, fOFFSET = 10 MHz | -152 | dBc/Hz |