SCAS887B September 2009 – January 2016 CDCLVP2106
PRODUCTION DATA.
The CDCLVP2106 is an open emitter for LVPECL outputs. Therefore, proper biasing and termination are required to ensure correct operation of the device and to minimize signal integrity. The proper termination for LVPECL outputs is a 50 Ω to (VCC – 2) V, but this direct-coupled (DC) voltage is not readily available on PCB. Therefore, a Thevenin equivalent circuit is worked out for the LVPECL termination in both DC- and AC-coupled configurations. These configurations are shown in Figure 12 (a and b) for VCC=2.5 V and Figure 13 (a and b) for VCC=3.3 V, respectively. TI recommends placing all resistive components close to either the driver end or the receiver end. If the supply voltage for the driver and receiver is different, AC coupling is required.
The CDCLVP2106 is a low-additive jitter universal to LVPECL fan-out buffer with two independent inputs. The small package, low output skew, and low-additive jitter make for a flexible device in demanding applications.
The two independent inputs of the CDCLVP2106 distribute the input clock to six outputs each. Unused inputs and outputs can be left floating to reduce overall component cost. Both AC- and DC coupling schemes can be used with the CDCLVP2106 to provide greater system flexibility.
The CDCLVP2106 is an open emitter for LVPECL outputs. Therefore, proper biasing and termination are required to ensure correct operation of the device and to minimize signal integrity. The proper termination for LVPECL outputs is a 50 Ω to (VCC –2) V, but this DC voltage is not readily available on PCB. Therefore, a Thevenin equivalent circuit is worked out for the LVPECL termination in both direct-coupled (DC) and AC-coupled configurations. These configurations are shown in Figure 12 a and b for VCC = 2.5 V and Figure 13 a and b for VCC = 3.3 V, respectively. TI recommends placing all resistive components close to either the driver end or the receiver end. If the supply voltage for the driver and receiver is different, AC coupling is required.
The CDCLVP2106 inputs can be interfaced with LVPECL, LVDS, or LVCMOS drivers. Figure 14 shows how to DC-couple an LVCMOS input to the CDCLVP2106. The series resistance (RS) should be placed close to the LVCMOS driver; its value is calculated as the difference between the transmission line impedance and the driver output impedance.
Figure 15 shows how to DC couple LVDS inputs to the CDCLVP2106. Figure 16 and Figure 17 describe the method of DC coupling LVPECL inputs to the CDCLVP2106 for VCC = 2.5 V and VCC = 3.3 V, respectively.
Figure 18 and Figure 19 show the technique of AC coupling differential inputs to the CDCLVP2106 for
VCC = 2.5 V and VCC = 3.3 V, respectively. TI recommends placing all resistive components close to either the driver end or the receiver end. If the supply voltages of the driver and receiver are different, AC coupling is required.