SCAS922A
February 2012 – April 2016
CDCM9102
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Parameter Measurement Information
8.1
Test Configurations
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagrams
9.3
Feature Description
9.4
Device Functional Modes
9.4.1
Crystal Input (XIN) Interface
9.4.2
Interfacing between LVPECL and HCSL (PCI Express)
9.5
Programming
9.5.1
Device Configuration
10
Application and Implementation
10.1
Application Information
10.1.1
Start-Up Time Estimation
10.1.2
Output Termination
10.1.3
LVPECL Termination
10.1.4
LVDS Termination
10.1.5
LVCMOS Termination
10.1.6
PCI Express Applications
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Device Selection
10.2.2.1.1
Calculation Using LCM
10.2.2.2
Device Configuration
10.2.3
Application Curve
11
Power Supply Recommendations
11.1
Thermal Management
11.2
Power Supply Filtering
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
Device and Documentation Support
13.1
Community Resources
13.2
Trademarks
13.3
Electrostatic Discharge Caution
13.4
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RHB|32
MPQF130D
Thermal pad, mechanical data (Package|Pins)
RHB|32
QFND029X
Orderable Information
scas922a_oa
scas922a_pm
8 Parameter Measurement Information
8.1 Test Configurations
Figure 2. LVCMOS Output Test Load
Figure 3. LVCMOS AC Configuration for Device Test
Figure 4. LVPECL DC Configuration for Device Test
Figure 5. LVPECL AC Configuration for Device Test
Figure 6. LVDS DC Configuration for Device Test
Figure 7. LVDS AC Configuration for Device Test