SLPS371A December   2011  – September 2016 CSD16327Q3

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Community Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Q3 Package Dimensions
    2. 7.2 Recommended PCB Pattern
    3. 7.3 Recommended Stencil Opening
    4. 7.4 Q3 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DQG|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Specifications

5.1 Electrical Characteristics

TA = 25°C (unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-source voltage VGS = 0 V, ID = 250 μA 25 V
IDSS Drain-to-source leakage current VGS = 0 V, VDS = 20 V 1 μA
IGSS Gate-to-source leakage current VDS = 0 V, VGS = +10 / –8 V 100 nA
VGS(th) Gate-to-source threshold voltage VDS = VGS, ID = 250 μA 0.9 1.2 1.4 V
RDS(on) Drain-to-source on-resistance VGS = 3 V, ID = 24 A 5 6.5 mΩ
VGS = 4.5 V, ID = 24 A 4 4.8
VGS = 8 V, ID = 24 A 3.4 4.0
gfs Transconductance VDS = 12.5 V, ID = 24 A 96 S
DYNAMIC CHARACTERISTICS
CISS Input capacitance VGS = 0 V, VDS = 12.5 V, f = 1 MHz 1020 1300 pF
COSS Output capacitance 740 960 pF
CRSS Reverse transfer capacitance 50 65 pF
Rg Series gate resistance 1.4 2.8 Ω
Qg Gate charge total (4.5 V) VDS = 12.5 V, ID = 24 A 6.2 8.4 nC
Qgd Gate charge gate-to-drain 1.1 nC
Qgs Gate charge gate-to-source 1.8 nC
Qg(th) Gate charge at Vth 1 nC
QOSS Output charge VDS = 12.5 V, VGS = 0 V 14 nC
td(on) Turnon delay time VDS = 12.5 V, VGS = 4.5 V ID = 24 A
RG = 2 Ω		 5.3 ns
tr Rise time 15 ns
td(off) Turnoff delay time 13 ns
tf Fall time 6.3 ns
DIODE CHARACTERISTICS
VSD Diode forward voltage IS = 24 A, VGS = 0 V 0.85 1 V
Qrr Reverse recovery charge VDD = 12.5 V, IF = 24 A, di/dt = 300 A/μs 21 nC
trr Reverse recovery time VDD = 12.5 V, IF = 24 A, di/dt = 300 A/μs 16 ns

5.2 Thermal Information

TA = 25°C (unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJC Junction-to-case thermal resistance(1) 1.7 °C/W
RθJA Junction-to-ambient thermal resistance(1)(2) 55 °C/W
(1) RθJC is determined with the device mounted on a 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in (3.81-cm × 3.81-cm), 0.06-in (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu.
CSD16327Q3 m0161-01_lps202.gif
Max RθJA = 55°C/W when mounted on 1-in2 (6.45-cm2) of 2-oz (0.071-mm) thick Cu.
CSD16327Q3 m0161-02_lps202.gif
Max RθJA = 160°C/W when mounted on a minimum pad area of 2-oz (0.071-mm) thick Cu.

5.3 Typical MOSFET Characteristics

TA = 25°C (unless otherwise stated)
CSD16327Q3 D001_SLPS371.png
Figure 1. Transient Thermal Impedance
CSD16327Q3 D002_SLPS371.gif
Figure 2. Saturation Characteristics
CSD16327Q3 D004_SLPS371.gif
ID = 24 A VDS = 12.5 V
Figure 4. Gate Charge
CSD16327Q3 D006_SLPS371.gif
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
CSD16327Q3 D008_SLPS371.gif
ID = 24 A
Figure 8. Normalized On-State Resistance vs Temperature
CSD16327Q3 D010_SLPS371.gif
Single pulse, max RθJC = 1.7°C/W
Figure 10. Maximum Safe Operating Area
CSD16327Q3 D012_SLPS371.gif
Figure 12. Maximum Drain Current vs Temperature
CSD16327Q3 D003_SLPS371.gif
VDS = 5 V
Figure 3. Transfer Characteristics
CSD16327Q3 D005_SLPS371.gif
Figure 5. Capacitance
CSD16327Q3 D007_SLPS371.gif
Figure 7. On-State Resistance vs Gate-to-Source Voltage
CSD16327Q3 D009_SLPS371.gif
Figure 9. Typical Diode Forward Voltage
CSD16327Q3 D011_SLPS371.gif
Figure 11. Single Pulse Unclamped Inductive Switching