SLPS623A November   2016  – January 2017 CSD18513Q5A

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Community Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Q5A Package Dimensions
    2. 7.2 Recommended PCB Pattern
    3. 7.3 Recommended Stencil Opening
    4. 7.4 Q5A Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Specifications

5.1 Electrical Characteristics

TA = 25°C (unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain to-source voltage VGS = 0 V, ID = 250 μA 40 V
IDSS Drain-to-source leakage current VGS = 0 V, VDS = 32 V 1 μA
IGSS Gate-to-source leakage current VDS = 0 V, VGS = 20 V 100 nA
VGS(th) Gate-to-source threshold voltage VDS = VGS, ID = 250 μA 1.5 1.8 2.4 V
RDS(on) Drain-to-source on resistance VGS = 4.5 V, ID = 19 A 4.1 5.3 mΩ
VGS = 10 V, ID = 19 A 2.8 3.4
gfs Transconductance VDS = 4 V, ID = 19 A 89 S
DYNAMIC CHARACTERISTICS
Ciss Input capacitance VGS = 0 V, VDS = 20 V, ƒ = 1 MHz 3300 4280 pF
Coss Output capacitance 333 433 pF
Crss Reverse transfer capacitance 178 231 pF
RG Series gate resistance 0.9 1.8 Ω
Qg Gate charge total (4.5 V) VDS = 20 V, ID = 19 A 23 30 nC
Qg Gate charge total (10 V) 45 59 nC
Qgd Gate charge gate-to-drain 8.8 nC
Qgs Gate charge gate-to-source 9.1 nC
Qg(th) Gate charge at Vth 5.8 nC
Qoss Output charge VDS = 20 V, VGS = 0 V 15 nC
td(on) Turnon delay time VDS = 20 V, VGS = 10 V,
IDS = 19 A, RG = 0		 6 ns
tr Rise time 12 ns
td(off) Turnoff delay time 21 ns
tf Fall time 4 ns
DIODE CHARACTERISTICS
VSD Diode forward voltage ISD = 19 A, VGS = 0 V 0.8 1.0 V
Qrr Reverse recovery charge VDS= 20 V, IF = 19 A,
di/dt = 300 A/μs		 12 nC
trr Reverse recovery time 12 ns

5.2 Thermal Information

TA = 25°C (unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJC Junction-to-case thermal resistance(1) 1.3 °C/W
RθJA Junction-to-ambient thermal resistance(1)(2) 50 °C/W
(1) RθJC is determined with the device mounted on a 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in
(3.81-cm × 3.81-cm), 0.06-in (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu.

CSD18513Q5A M0137-01_LPS198.gif
Max RθJA = 50°C/W when mounted on 1 in2 (6.45 cm2) of
2-oz (0.071-mm) thick Cu.
CSD18513Q5A M0137-02_LPS198.gif
Max RθJA = 125°C/W when mounted on a minimum pad area of
2-oz (0.071-mm) thick Cu.

5.3 Typical MOSFET Characteristics

TA = 25°C (unless otherwise stated)
CSD18513Q5A D001_SLPS623.png
Figure 1. Transient Thermal Impedance
CSD18513Q5A D002_SLPS623.gif
Figure 2. Saturation Characteristics
CSD18513Q5A D004_SLPS623A.gif
ID = 19 A, VDS = 20 V
Figure 4. Gate Charge
CSD18513Q5A D006_SLPS623.gif
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
CSD18513Q5A D008_SLPS623.gif
ID = 19 A
Figure 8. Normalized On-State Resistance vs Temperature
CSD18513Q5A D010_SLPS623.gif
Single pulse, max RθJC= 1.3°C/W
Figure 10. Maximum Safe Operating Area
CSD18513Q5A D012_SLPS623.gif
Max RθJC= 1.3°C/W
Figure 12. Maximum Drain Current vs Temperature
CSD18513Q5A D003_SLPS623.gif
VDS = 5 V
Figure 3. Transfer Characteristics
CSD18513Q5A D005_SLPS623.gif
Figure 5. Capacitance
CSD18513Q5A D007_SLPS623.gif
Figure 7. On-State Resistance vs Gate-to-Source Voltage
CSD18513Q5A D009_SLPS623.gif
Figure 9. Typical Diode Forward Voltage
CSD18513Q5A D011_SLPS623.gif
Figure 11. Single Pulse Unclamped Inductive Switching