SLPS508A June   2014  – July 2014 CSD25202W15

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Trademarks
    2. 6.2 Electrostatic Discharge Caution
    3. 6.3 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 CSD25202W15 Package Dimensions
    2. 7.2 Recommended Land Pattern
    3. 7.3 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YZF|9
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Specifications

5.1 Electrical Characteristics

(TA = 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-Source Voltage VGS = 0 V, IDS = –250 μA –20 V
BVGSS Gate-to-Source Voltage VDS = 0 V, IG = –250 μA –6 –7.2 V
IDDS Drain-to-Source Leakage Current VGS = 0 V, VDS = –16 V –1 μA
IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = –6 V –100 nA
VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, IDS = –250 μA –0.45 –0.75 –1.05 V
RDS(on) Drain-to-Source On Resistance VGS = –1.8 V, IDS = –2 A 40 52
VGS = –2.5 V, IDS = –2 A 26 32
VGS = –4.5 V, IDS = –2 A 21 26
gƒs Transconductance VDS = –2 V, IDS = –2 A 16 S
DYNAMIC CHARACTERISTICS
CISS Input Capacitance VGS = 0 V, VDS = –10 V,
ƒ = 1 MHz
778 1010 pF
COSS Output Capacitance 400 520 pF
CRSS Reverse Transfer Capacitance 21 27 pF
RG Series Gate Resistance(1) 31 Ω
Qg Gate Charge Total (–4.5 V) VDS = –10 V,
ID = –2 A
5.8 7.5 nC
Qgd Gate Charge - Gate-to-Drain 0.8 nC
Qgs Gate Charge - Gate-to-Source 1.1 nC
Qg(th) Gate Charge at Vth 0.6 nC
QOSS Output Charge VDS = –9.5 V, VGS = 0 V 8.7 nC
td(on) Turn On Delay Time(2) VDS = –10 V, VGS = –4.5 V,
IDS = –2 A, RG = 2 Ω
15 ns
tr Rise Time(2) 12 ns
td(off) Turn Off Delay Time(2) 64 ns
tf Fall Time(2) 28 ns
DIODE CHARACTERISTICS
VSD Diode Forward Voltage IDS = –2 A, VGS = 0 V –0.75 –1 V
Qrr Reverse Recovery Charge VSD = –10 V, IF = –2 A,
di/dt = 200 A/μs
19 nC
trr Reverse Recovery Time 26 ns
(1) Includes gate clamp resistor
(2) External RG is in addition to the internal gate clamp resistor

5.2 Thermal Information

(TA = 25°C unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJA Junction-to-Ambient Thermal Resistance(1) 220 °C/W
Junction-to-Ambient Thermal Resistance(2) 140
(1) Device mounted on FR4 material with minimum Cu mounting area.
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
M0149-01_LPS266.gif
Typ RθJA = 140°C/W when mounted on 1 inch2 (6.45 cm2) of
2-oz. (0.071-mm thick) Cu.
M0150-01_LPS266.gif
Typ RθJA = 220°C/W when mounted on a minimum pad area of 2-oz. (0.071-mm thick) Cu.

5.3 Typical MOSFET Characteristics

(TA = 25°C unless otherwise stated)
graph01p2_SLPS508.png
Figure 1. Transient Thermal Impedance
graph02_SLPS508.png
Figure 2. Saturation Characteristics
graph04_SLPS508.png
ID = –2 A VDS = –10 V
Figure 4. Gate Charge
graph06_SLPS508.png
ID = –250 µA
Figure 6. Threshold Voltage vs Temperature
graph08_SLPS508.png
ID = –2 A
Figure 8. Normalized On-State Resistance vs Temperature
graph10_SLPS508.png
Single Pulse, Max RθJA = 220°C/W
Figure 10. Maximum Safe Operating Area
graph03_SLPS508.png
VDS = –5 V
Figure 3. Transfer Characteristics
graph05_SLPS508.png
Figure 5. Capacitance
graph07_SLPS508.png
Figure 7. On-State Resistance vs Gate-to-Source Voltage
graph09p2_SLPS508.png
Figure 9. Typical Diode Forward Voltage
graph12_SLPS508.png
Figure 11. Maximum Drain Current vs Temperature