SLPS454B December   2013  – January 2016 CSD25402Q3A

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Community Resources
    2. 6.2 Trademarks
    3. 6.3 Electrostatic Discharge Caution
    4. 6.4 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Q3A Package Dimensions
    2. 7.2 Q3A Recommended PCB Pattern
    3. 7.3 Q3A Recommended Stencil Pattern
    4. 7.4 Q3A Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Specifications

5.1 Electrical Characteristics

(TA = 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-source voltage VGS = 0 V, ID = –250 μA –20 V
IDSS Drain-to-source leakage current VGS = 0 V, VDS = –16 V –1 μA
IGSS Gate-to-source leakage current VDS = 0 V, VGS = ±12 V –100 nA
VGS(th) Gate-to-source threshold voltage VDS = VGS, ID = –250 μA –0.65 –0.90 –1.15 V
RDS(on) Drain-to-source on resistance VGS = –1.8 V, ID = –1 A 74 300
VGS = –2.5 V, ID = –10 A 13.3 15.9
VGS = –4.5 V, ID = –10 A 7.7 8.9
gfs Transconductance VDS = –10 V, ID = –10 A 59 S
DYNAMIC CHARACTERISTICS
CISS Input capacitance VGS = 0 V, VDS = –10 V,
ƒ = 1 MHz
1380 1790 pF
COSS Output capacitance 763 992 pF
CRSS Reverse transfer capacitance 39 51 pF
RG Series gate resistance 3.7 7.4 Ω
Qg Gate charge total (–4.5 V) VDS = –10 V, ID = –10 A 7.5 9.7 nC
Qgd Gate charge gate to drain 1.1 nC
Qgs Gate charge gate to source 2.4 nC
Qg(th) Gate charge at Vth 1.0 nC
QOSS Output charge VDS = –10 V, VGS = 0 V 7.6 nC
td(on) Turn on delay time VDS = –10 V, VGS = –4.5 V,
ID = –10 A , RG = 5 Ω
10 ns
tr Rise time 7 ns
td(off) Turn off delay time 25 ns
tf Fall time 12 ns
DIODE CHARACTERISTICS
VSD Diode forward voltage IS = –10 A, VGS = 0 V –0.8 –1 V
Qrr Reverse recovery charge VDS = –8.5 V, IF = –10 A,
di/dt = 200 A/μs
10.3 nC
trr Reverse recovery time 21 ns

5.2 Thermal Information

(TA = 25°C unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJC Junction-to-case thermal resistance(1) 2.3 °C/W
RθJA Junction-to-ambient thermal resistance(1)(2) 55 °C/W
(1) RθJC is determined with the device mounted on a 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu pad on a 1.5 inch × 1.5 inch (3.81 cm × 3.81 cm), 0.06 inch (1.52 mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu.
CSD25402Q3A m0137-01_lps211.gif
Max RθJA = 55°C/W when mounted on
1 inch2 of 2 oz. Cu.
CSD25402Q3A m0137-02_lps211.gif
Max RθJA = 175°C/W when mounted on minimum pad area of
2 oz. Cu.

5.3 Typical MOSFET Characteristics

(TA = 25°C unless otherwise stated)
CSD25402Q3A D001_SLPS454.png
Figure 1. Transient Thermal Impedance
CSD25402Q3A D002_SLPS454.gif
Figure 2. Saturation Characteristics
CSD25402Q3A D004_SLPS454.gif
ID = –10 A VDS = –10 V
Figure 4. Gate Charge
CSD25402Q3A D006_SLPS454.gif
ID = –250 µA
Figure 6. Threshold Voltage vs Temperature
CSD25402Q3A D008_SLPS454.gif
ID = –10 A
Figure 8. Normalized On-State Resistance vs Temperature
CSD25402Q3A D010_SLPS454.gif
Single Pulse, Max RθJC = 2.3°C/W
Figure 10. Maximum Safe Operating Area
CSD25402Q3A D003_SLPS454.gif
VDS = –5 V
Figure 3. Transfer Characteristics
CSD25402Q3A D005_SLPS454.gif
Figure 5. Capacitance
CSD25402Q3A D007_SLPS454.gif
Figure 7. On-State Resistance vs Gate-to-Source Voltage
CSD25402Q3A D009_SLPS454.gif
Figure 9. Typical Diode Forward Voltage
CSD25402Q3A D011_SLPS454.gif
Figure 11. Maximum Drain Current vs Temperature