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  • CSD85302L 20 V Dual N-Channel NexFET™ Power MOSFET

    • SLPS561 November   2015 CSD85302L

      PRODUCTION DATA.  

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  • CSD85302L 20 V Dual N-Channel NexFET™ Power MOSFET
  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Community Resources
    2. 6.2 Trademarks
    3. 6.3 Electrostatic Discharge Caution
    4. 6.4 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Package Dimensions
    2. 7.2 Recommended PCB Pattern
    3. 7.3 Recommended Stencil Pattern
    4. 7.4 Q3A Tape and Reel Information
  8. IMPORTANT NOTICE

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YME|4
Thermal pad, mechanical data (Package|Pins)
Orderable Information
  • slps561_oa
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DATA SHEET

CSD85302L 20 V Dual N-Channel NexFET™ Power MOSFET

1 Features

  • Common Drain Configuration
  • Low On-Resistance
  • Small Footprint of 1.35 mm × 1.35 mm
  • Pb Free and Halogen Free
  • RoHS Compliant
  • ESD HBM Protection >2.5 kV

2 Applications

  • USB Type-C/PD
  • Battery Management
  • Battery Protection

3 Description

This 20 V, 18.7 mΩ, 1.35 mm × 1.35 mm LGA Dual NexFET™ power MOSFET is designed to minimize resistance in the smallest footprint. Its small footprint and common drain configuration make the device ideal for battery-powered applications in small handheld devices.

Top View
CSD85302L Pin_Map.png
Configuration
CSD85302L Configuration.gif

Text added for spacing

Product Summary

TA = 25°C TYPICAL VALUE UNIT
VS1S2 Source-to-Source Voltage 20 V
Qg Gate Charge Total (4.5 V) 6 nC
Qgd Gate Charge Gate-to-Drain 1.4 nC
RS1S2(on) Source-to-Source On-Resistance VGS = 2.5 V 29 mΩ
VGS = 4.5 V 20 mΩ
VGS = 6.5 V 18.7 mΩ
VGS(th) Threshold Voltage 0.9 V

Ordering Information(1)

DEVICE QTY MEDIA PACKAGE SHIP
CSD85302L 3000 7-Inch Reel 1.35 × 1.35 mm Land Grid Array (LGA) Package Tape and Reel
CSD85302LT 250
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Absolute Maximum Ratings

TA = 25°C VALUE UNIT
VS1S2 Source-to-Source Voltage 20 V
VGS Gate-to-Source Voltage ±10 V
IS Continuous Source Current(1) 7 A
ISM Pulsed Source Current(2) 37 A
PD Power Dissipation(1) 1.7 W
V(ESD) Human Body Model (HBM) 2.5 kV
TJ,
Tstg		 Operating Junction and
Storage Temperature Range		 –55 to 150 °C
  1. Typical RθJA = 75°C/W when mounted on a 1 inch2, 2 oz. Cu pad on a 0.06 inch thick FR4 PCB.
  2. Max RθJA = 90°C/W, pulse duration ≤100 μs, duty cycle ≤1%

.

RDS(on) vs VGS

CSD85302L D007_SLPS558.gif

.

Gate Charge

CSD85302L D004_SLPS558_FP.gif

4 Revision History

DATE REVISION NOTES
November 2015 * Initial release.

5 Specifications

5.1 Electrical Characteristics

(TA = 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVS1S2 Source-to-source voltage VGS = 0 V, IS = 250 μA 20 V
IS1S2 Source-to-source leakage current VGS = 0 V, VS1S2 = 16 V 1 μA
IGSS Gate-to-source leakage current VS1S2 = 0 V, VGS = 6 V 0.5 µA
VS1S2 = 0 V, VGS = 10V 4 µA
VGS(th) Gate-to-source threshold voltage VS1S2 = VGS, IS = 250 μA 0.68 0.9 1.3 V
RS1S2(on) Source-to-source on-resistance VGS = 2.5 V, IS = 2 A 20 29 36 mΩ
VGS = 4.5 V, IS = 2 A 14 20 24 mΩ
VGS = 6.5 V, IS = 2 A 13 18.7 22.5 mΩ
gfs Transconductance VS1S2 = 2 V, IS = 2 A 19 S
DYNAMIC CHARACTERISTICS(1)
Ciss Input capacitance VGS = 0 V, VS1S2 = 10 V, ƒ = 1 MHz 718 933 pF
Coss Output capacitance 92 120 pF
Crss Reverse transfer capacitance 61 79 pF
Qg Gate charge total (4.5 V) VS1S2 = 10 V, IS = 2 A 6.0 7.8 nC
Qgd Gate charge gate-to-drain 1.4 nC
Qgs Gate charge gate-to-source 1.2 nC
Qg(th) Gate charge at Vth 0.6 nC
Qoss Output charge VS1S2 = 10 V, VGS = 0 V 2.3 nC
td(on) Turn-on delay time VS1S2 = 10 V, VGS = 4.5 V,
IS1S2 = 2 A, RG = 0 Ω		 37 ns
tr Rise time 54 ns
td(off) Turn-off delay time 173 ns
tf Fall time 99 ns
(1) Charge and timing values specified are per single FET.

5.2 Thermal Information

(TA = 25°C unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJA Junction-to-ambient thermal resistance(1) 75 °C/W
Junction-to-ambient thermal resistance(2) 175 °C/W
(1) Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu.
(2) Device mounted on FR4 material with minimum Cu mounting area.

5.3 Typical MOSFET Characteristics

(TA = 25°C unless otherwise stated)
CSD85302L D001_SLPS558_r2.png
Figure 1. Transient Thermal Impedance
CSD85302L D002_SLPS558_r3.gif
VG2S2 = 9 V
Figure 2. Saturation Characteristics
CSD85302L D004_SLPS558.gif
IS = 2 A VS1S2 = 6 V
Figure 4. Gate Charge
CSD85302L D006_SLPS558.gif
IS = 250 µA
Figure 6. Threshold Voltage vs Temperature
CSD85302L D008_SLPS558.gif
IS = 2 A
Figure 8. Normalized On-State Resistance vs Temperature
CSD85302L D010_SLPS558_r2.gif
Typical RθJA = 75°C/W
Figure 10. Maximum Source Current vs Temperature
CSD85302L D003_SLPS558_r2.gif
VS1S2 = 5 V VG2S2 = 9 V
Figure 3. Transfer Characteristics
CSD85302L D005_SLPS558.gif
Figure 5. Capacitance
CSD85302L D007_SLPS558.gif
Figure 7. On-State Source-to-Source Resistance vs
Gate-to-Source Voltage
CSD85302L D009_SLPS558_r2.gif
Single pulse, max RθJA = 90°C/W
Figure 9. Maximum Safe Operating Area

 
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