SLPS574B February   2016  – April 2018 CSD87335Q3D

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
    1.     Top View
      1.      Device Images
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Power Block Performance
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Power Block Device Characteristics
    7. 5.7 Typical Power Block MOSFET Characteristics
  6. 6Applications and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Equivalent System Performance
    2. 6.2 Power Loss Curves
    3. 6.3 Safe Operating Curves (SOA)
    4. 6.4 Normalized Curves
    5. 6.5 Calculating Power Loss and SOA
      1. 6.5.1 Design Example
      2. 6.5.2 Calculating Power Loss
      3. 6.5.3 Calculating SOA Adjustments
  7. 7Recommended PCB Design Overview
    1. 7.1 Electrical Performance
    2. 7.2 Thermal Performance
  8. 8Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Community Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  9. 9Mechanical, Packaging, and Orderable Information
    1. 9.1 Q3D Package Dimensions
    2. 9.2 Land Pattern Recommendation
    3. 9.3 Stencil Recommendation
    4. 9.4 Q3D Tape and Reel Information
    5. 9.5 Pin Configuration

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Typical Power Block Device Characteristics

Test conditions: VIN = 12 V, VDD = 5 V, ƒSW = 500 kHz, VOUT = 1.3 V, LOUT = 950 nH, IOUT = 25 A, TJ = 125°C, unless stated otherwise.
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Figure 1. Power Loss vs Output Current
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Figure 3. Safe Operating Area – PCB Horizontal Mount(1)1
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Figure 2. Power Loss vs Temperature
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Figure 4. Typical Safe Operating Area(1)1
1. The Typical Power Block System Characteristic curves are based on measurements made on a PCB design with dimensions of 4 in (W) × 3.5 in (L) × 0.062 in (H) and 6 copper layers of 1-oz copper thickness. See Applications and Implementation section for detailed explanation.
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Figure 5. Normalized Power Loss vs Switching Frequency
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Figure 7. Normalized Power Loss vs Output Voltage
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Figure 6. Normalized Power Loss vs Input Voltage
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Figure 8. Normalized Power Loss vs Output Inductance