SLPS714A January   2019  – March 2019 CSD96497Q5MC

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
    1.     Device Images
      1.      Simplified Application
      2.      Typical Power Stage Efficiency
  4. 4Revision History
  5. 5Device and Documentation Support
    1. 5.1 Trademarks
    2. 5.2 Electrostatic Discharge Caution
    3. 5.3 Glossary
  6. 6Mechanical, Packaging, and Orderable Information
    1. 6.1 Mechanical Drawing
    2. 6.2 Recommended PCB Land Pattern
    3. 6.3 Recommended Stencil Opening
  7. 7Package Option Addendum
    1. 7.1 Packaging Information
    2. 7.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
  • DMC|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.2 Recommended PCB Land Pattern

CSD96497Q5MC PCB1.png
CSD96497Q5MC PCB2.png
  1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M.
  2. This drawing is subject to change without notice.
  3. This package is designed to be soldered to thermal pads on the board. For more information, see QFN/SON PCB Attachment (SLUA271).
  4. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented.