SNAS424D August   2007  – April 2016 DAC088S085

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 AC and Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DAC Architecture
      2. 8.3.2 Output Amplifiers
      3. 8.3.3 Reference Voltage
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
      2. 8.4.2 Power-Down Modes
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
      2. 8.5.2 Daisy Chain Operation
      3. 8.5.3 Serial Input Register
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Examples Programming the DAC088S085
        1. 9.1.1.1 Updating DAC Outputs Simultaneously
        2. 9.1.1.2 Updating DAC Outputs Independently
      2. 9.1.2 Bipolar Operation
      3. 9.1.3 Variable Current Source Output
      4. 9.1.4 DSP and Microprocessor Interfacing
        1. 9.1.4.1 ADSP-2101 and ADSP2103 Interfacing
        2. 9.1.4.2 80C51 and 80L51 Interface
        3. 9.1.4.3 68HC11 Interface
        4. 9.1.4.4 Microwire Interface
      5. 9.1.5 Industrial Application
    2. 9.2 Typical Applications
      1. 9.2.1 ADC Reference
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Programmable Attenuator
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
    1. 10.1 Using References as Power Supplies
      1. 10.1.1 LM4132
      2. 10.1.2 LM4050
      3. 10.1.3 LP3985
      4. 10.1.4 LP2980
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
        1. 12.1.1.1 Specification Definitions
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

For best accuracy and minimum noise, the printed-circuit board containing the DAC088S085 must have separate analog and digital areas. The areas are defined by the locations of the analog and digital power planes. Both of these planes must be located in the same board layer. A single ground plane is preferred if digital return current does not flow through the analog ground area. Frequently a single ground plane design uses a fencing technique to prevent the mixing of analog and digital ground current. Separate ground planes must only be used when the fencing technique is inadequate. The separate ground planes must be connected in one place, preferably near the DAC088S085. Take special care to ensure that digital signals with fast edge rates do not pass over split ground planes. They must always have a continuous return path below their traces.

For best performance, the DAC088S085 power supply must be bypassed with at least a 1-µF and a 0.1-µF capacitor. The 0.1-µF capacitor must be placed right at the device supply pin. The 1-µF or larger valued capacitor can be a tantalum capacitor while the 0.1-µF capacitor must be a ceramic capacitor with low ESL and low ESR. If a ceramic capacitor with low ESL and low ESR is used for the 1-µF value and it can be placed right at the supply pin, the 0.1-µF capacitor can be eliminated. Capacitors of this nature typically span the same frequency spectrum as the 0.1-µF capacitor and thus eliminate the need for the extra capacitor. The power supply for the DAC088S085 must only be used for analog circuits.

It is also advisable to avoid the crossover of analog and digital signals. This helps minimize the amount of noise from the transitions of the digital signals from coupling onto the sensitive analog signals such as the reference pins and the DAC outputs.

11.2 Layout Example

DAC088S085 Layout.gif Figure 47. Typical Layout