SNVS801B April   2012  – January 2016 DAC101C081 , DAC101C081Q , DAC101C085

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 AC and Timing Characteristics
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 DAC Section
      2. 9.3.2 Output Amplifier
      3. 9.3.3 Reference Voltage
      4. 9.3.4 Power-On Reset
      5. 9.3.5 Simultaneous Reset
      6. 9.3.6 Additional Timing Information: toutz
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power-Down Modes
    5. 9.5 Programming
      1. 9.5.1 Serial Interface
      2. 9.5.2 Basic I2C™ Protocol
      3. 9.5.3 Standard-Fast Mode
      4. 9.5.4 High-Speed (Hs) Mode
      5. 9.5.5 I2C Slave (Hardware) Address
      6. 9.5.6 Writing to the DAC Register
      7. 9.5.7 Reading from the DAC Register
    6. 9.6 Registers
      1. 9.6.1 DAC Register
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Bipolar Operation
      2. 10.1.2 DSP/Microprocessor Interfacing
        1. 10.1.2.1 Interfacing to the 2-wire Bus
        2. 10.1.2.2 Interfacing to a Hs-mode Bus
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
    1. 11.1 Using References as Power Supplies
      1. 11.1.1 LM4132
      2. 11.1.2 LM4050
      3. 11.1.3 LP3985
      4. 11.1.4 LP2980
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Device Nomenclature
        1. 13.1.1.1 Specification Definitions
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from A Revision (March 2013) to B Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. Go
  • Added addresses that the DAC responds to on the I2C bus.Go

Changes from * Revision (March 2013) to A Revision

  • Changed layout of National Data Sheet to TI formatGo