SNAS321G June   2005  – April 2016 DAC101S101 , DAC101S101-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings DAC101S101
    3. 7.3 ESD Ratings DAC101S101-Q1
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Thermal Information
    6. 7.6 Electrical Characteristics
    7. 7.7 A.C. and Timing Requirements
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DAC Section
      2. 8.3.2 Resistor String
      3. 8.3.3 Output Amplifier
      4. 8.3.4 Power-On Reset
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Modes
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
      2. 8.5.2 Input Shift Register
      3. 8.5.3 DSP/Microprocessor Interfacing
        1. 8.5.3.1 ADSP-2101/ADSP2103 Interfacing
        2. 8.5.3.2 80C51/80L51 Interface
        3. 8.5.3.3 68HC11 Interface
        4. 8.5.3.4 Microwire Interface
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Using References as Power Supplies
      1. 10.1.1 LM4130
      2. 10.1.2 LM4050
      3. 10.1.3 LP3985
      4. 10.1.4 LP2980
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The DAC101S101 is designed for single supply operation and thus has a unipolar output. However, a bipolar output may be obtained with the circuit in Figure 41. This circuit will provide an output voltage range of ±5 Volts. A rail-to-rail amplifier should be used if the amplifier supplies are limited to ±5V.

9.2 Typical Application

DAC101S101 DAC101S101-Q1 20154117.gif Figure 41. Bipolar Operation

9.2.1 Design Requirements

  • The DAC101S101 will use a single supply.
  • The output is required to be bipolar with a voltage range of ±5 V.
  • Dual supplies will be used for the output amplifier.

9.2.2 Detailed Design Procedure

The output voltage of this circuit for any code is found to be

Equation 2. VO = (VA x (D / 1024) x ((R1 + R2) / R1) - VA x R2 / R1)

where

  • D is the input code in decimal form
  • With VA = 5V and R1 = R2
Equation 3. VO = (10 x D / 1024) - 5V

A list of rail-to-rail amplifiers suitable for this application are indicated in Table 2.

Table 2. Some Rail-To-Rail Amplifiers

AMP PKGS  Typ VOS Typ ISUPPLY
LMC7111 SOT-23-5 0.9 mV 25 µA
LM7301 SOIC-8
SOT-23-5		 0.03 mV 620 µA
LM8261 SOT-23-5 0.7 mV 1 mA

9.2.3 Application Curve

DAC101S101 DAC101S101-Q1 Application1.gif Figure 42. Bipolar Input / Output Transfer Characteristic