SNAS362G May   2006  – April 2016 DAC104S085 , DAC104S085-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings - DAC104S085
    3. 7.3 ESD Ratings - DAC104S085-Q1
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Thermal Information
    6. 7.6 Electrical Characteristics
    7. 7.7 Timing Requirements
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Output Amplifiers
      2. 8.3.2 Reference Voltage
      3. 8.3.3 Power-On Reset
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Modes
      2. 8.4.2 Bipolar Operation
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
      2. 8.5.2 Input Shift Register
      3. 8.5.3 DSP and Microprocessor Interfacing
        1. 8.5.3.1 ADSP-2101 and ADSP2103 Interfacing
        2. 8.5.3.2 80C51 and 80L51 Interface
        3. 8.5.3.3 68HC11 Interface
        4. 8.5.3.4 Microwire Interface
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 LM4130
      2. 9.1.2 LP3985
      3. 9.1.3 LP2980
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
        1. 12.1.1.1 Specification Definitions
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

DSC Package
10-Pin SON
Top View
DAC104S085 DAC104S085-Q1 20195301.gif
DGS Package
10-Pin VSSOP
Top View
DAC104S085 DAC104S085-Q1 20195302.gif

Pin Functions

PIN TYPE DESCRIPTION
NO. NAME
1 VA Supply Power supply input. Must be decoupled to GND.
2 VOUTA Analog Output Channel A Analog Output Voltage.
3 VOUTB Analog Output Channel B Analog Output Voltage.
4 VOUTC Analog Output Channel C Analog Output Voltage.
5 VOUTD Analog Output Channel D Analog Output Voltage.
6 GND Ground Ground reference for all on-chip circuitry.
7 VREFIN Analog Input Unbuffered reference voltage shared by all channels. Must be decoupled to GND.
8 DIN Digital Input Serial Data Input. Data is clocked into the 16-bit shift register on the falling edges of SCLK after the fall of SYNC.
9 SYNC Digital Input Frame synchronization input for the data input. When this pin goes low, it enables the input shift register and data is transferred on the falling edges of SCLK. The DAC is updated on the 16th clock cycle unless SYNC is brought high before the 16th clock, in which case the rising edge of SYNC acts as an interrupt and the write sequence is ignored by the DAC.
10 SCLK Digital Input Serial Clock Input. Data is clocked into the input shift register on the falling edges of this pin.
11 PAD
(SON only)		 Ground Exposed die attach pad can be connected to ground or left floating. Soldering the pad to the PCB offers optimal thermal performance and enhances package self-alignment during reflow.