SBAS649B June 2021 – June 2022 DAC12DL3200
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
DC ACCURACY | ||||||
BITS | DAC core resolution(1) | 16 | bits | |||
DNL | Differential nonlinearity | LVDS input with 12-bit resolution (1 LSB = Fullscale/4096) | ±0.6 | LSB | ||
INL | Integral nonlinearity | LVDS input with 12-bit resolution (1 LSB = Fullscale/4096) | ±0.9 | LSB | ||
DAC ANALOG OUTPUT (IOUTA+, IOUTA–, IOUTB+, IOUTB–) | ||||||
POUTFS | Output power | DACFS = 0xF, NRZ mode, 6.4 Gsps, fOUT = 397 MHz, measured into 100-Ω load(5)(4) | 1.4 | dBm | ||
IFS | Switched full scale output current(2) | 3.6-kΩ resistor from RBIAS to AGND, COARSE_CUR_A/B = 0xF and FINE_CUR_A/FINE_CUR_B = 0x1F | 20.5 | mA | ||
3.6-kΩ resistor from RBIAS to AGND, COARSE_CUR_A/B = 0x0 and FINE_CUR_A/FINE_CUR_B = 0x00 | 5.2 | |||||
IFSDRIFT | Full scale output current temperature drift | 3.6-kΩ resistor from RBIAS to AGND, COARSE_CUR_A/B = 0xF and FINE_CUR_A/FINE_CUR_B = 0x1F | 0.6 | uA/℃ | ||
23 | PPM/℃ | |||||
VCOMP | Output compliance voltage range | Meaured from VOUTA+, VOUTA–, VOUTB+ or VOUTB– to AGND | 1.3 | 2.3 | V | |
COUT | Output capacitance | Single-ended capacitance to ground | 0.04 | pF | ||
RTERM | Output differential termination resistance | 109 | Ω | |||
RTERMDRIFT | Output differential termination resistance temperature coeff | -0.13 | mΩ/℃ | |||
-133 | PPM/℃ | |||||
CLOCK AND SYSREF INPUTS (CLKIN+, CLKIN-, SYSREF+, SYSREF-) | ||||||
RT | Internal differential termination resistance | 107 | Ω | |||
VCM | Input common mode voltage | 0.5 | V | |||
CIN | Internal differential input capacitance | 0.5 | pF | |||
REFERENCE OUTPUT (EXTIO) | ||||||
VREF | Reference output voltage | 0.9 | V | |||
VREF-DRIFT | Reference output voltage drift over temperature | ±34 | ppm/°C | |||
IREF | Maximum reference output current sourcing capability | 100 | nA | |||
LVDS INTERFACE (DAx±, DBx±, DCx±, DDx±, DxSTR±, DCLKx±) | ||||||
RT | Internal differential termination resistance | 115 | Ω | |||
CMOS INTERFACE (SCLK, SCS, SDI, SDO, RESET, NCOBANKSEL, NCOSEL[0:3], SLEEP, SYNC) | ||||||
IIH | High level input current | High level input current(6) | 200 | uA | ||
IIL | Low level input current | Low level input current(6) | -200 | uA | ||
VIH | High level input voltage | SCLK, SCS, SDI, RESET, NCOBANKSEL, NCOSEL[0:3], SLEEP, SYNC, TESTMODE, TXENABLE(3) | 0.7 x VDDIO18 |
V | ||
VIL | Low level input voltage | SCLK, SCS, SDI, RESET, NCOBANKSEL, NCOSEL[0:3], SLEEP, SYNC, TESTMODE, TXENABLE(3) | 0.3 x VDDIO18 |
V | ||
CI | Input capacitance | Input capacitance | 2 | pF | ||
VOH | High level output voltage | ILOAD = –400 uA | 1.55 | V | ||
VOL | Low level output voltage | ILOAD = 400 uA | 0.25 | V | ||
TEMPERATURE SENSOR | ||||||
Res | Resolution | 8 | bits | |||
Range | Digital Range | -64 | 127 | ℃ | ||
TERROR | Temperature Error | TA = 25℃, device powered down except for temperature sensor and SPI interface | ±5 | ℃ |