SLASEA3D December 2016 – December 2023 DAC38RF80 , DAC38RF83 , DAC38RF84 , DAC38RF85 , DAC38RF90 , DAC38RF93
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | x |
W0C | W0C | W0C | W0C | W0C | W0C | W0C | W0C |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 |
W0C | W0C | W0C | W0C | W0C | W0C | W0C | W0C |
LEGEND: R/W = Read/Write; R = Read only; W0C = Write 0 to clear bit; -n = value after reset; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15:8 | ALM_LANE1_ERR | W0C | 0x00 | Lane1 errors: bit 15 = multiframe alignment error bit 14 = frame alignment error bit 13 = link configuration error bit 12 = elastic buffer overflow (bad RBD value) bit 11 = elastic buffer match error. The first non-/K/ doesn’t match “match_ctrl” and “match_data” programmed values. bit 10 = code synchronization error bit 9 = 8b/10b not-in-table code error bit 8 = 8b/10b disparity error |
7:4 | Reserved | W0C | 0x0 | Reserved |
3:0 | ALM_FIFO1_FLAGS | W0C | 0x0 | Lane1 FIFO errors: bit 3 = write_error : High if write request and FIFO is full (NOTE: only released when JESD block is initialize with mem_init_state) bit 2 = write_full : FIFO is FULL bit 1 = read_error : High if read request with empty FIFO (NOTE: only released when JESD block is initialize with mem_init_state) bit 0 = read_empty : FIFO is empty |