SLASEX3A March 2021 – December 2021 DAC43204 , DAC53204 , DAC63204
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
All the DAC channels can be configured as programmable comparators in the voltage-output mode. To enter the comparator mode for a channel, write 1 to the CMP-X-EN bit in the respective DAC-X-VOUT-CMP-CONFIG register. The comparator output can be configured as push-pull or open-drain using the CMP-X-OD-EN bit. To enable the comparator output on the output pin, write 1 to the CMP-X-OUT-EN bit. To invert the comparator output, write 1 to the CMP-X-INV-EN bit. The FBx pin has a finite impedance. By default, the FBx pin is in the high-impedance mode. To disable high-impedance on the FBx pin, write 1 to the CMP-X-HIZ-IN-DIS bit. Table 7-1 shows the comparator output at the pin for different bit settings.
CMP-X-EN | CMP-X-OUT-EN | CMP-X-OD-EN | CMP-X-INV-EN | CMPX-OUT PIN |
---|---|---|---|---|
0 | X | X | X | Comparator not enabled |
1 | 0 | X | X | No output |
1 | 1 | 0 | 0 | Push-pull output |
1 | 1 | 0 | 1 | Push-pull and inverted output |
1 | 1 | 1 | 0 | Open-drain output |
1 | 1 | 1 | 1 | Open-drain and inverted output |
Figure 7-3 shows the interface circuit when all the DAC channels are configured as comparators. The programmable comparator operation is as shown in Figure 7-4. Individual comparator channels can be configured in no-hysteresis, with-hysteresis, and window-comparator modes using the CMP-X-MODE bit in the respective DAC-X-CMP-MODE-CONFIG register, as shown in Table 7-2.
CMP-X-MODE BIT FIELD | COMPARATOR CONFIGURATION |
---|---|
00 | Normal comparator mode. No hysteresis or window operation. |
01 | Hysteresis comparator mode. DAC-X-MARGIN-HIGH and DAC-X-MARGIN-LOW registers set the hysteresis. |
10 | Window comparator mode. DAC-X-MARGIN-HIGH and DAC-X-MARGIN-LOW registers set the window bounds. |
11 | Invalid setting |