Refer to the PDF data sheet for device specific package drawings
The 12-bit DAC63204W and 10-bit DAC53204W (DACx3204W) are a pin-compatible family of quad-channel, buffered, voltage-output and current-output smart digital-to-analog converters (DACs). These devices support Hi-Z power-down mode and Hi-Z output during power-off condition. The DAC outputs provide a force-sense option for use as a programmable comparator and current source or sink. The multifunction GPIO, function generation, and NVM enable these smart DACs for processor-less applications and design reuse. These devices automatically detect I2C, SPI, and PMBus interfaces, and contain an internal reference.
The feature set combined with the tiny package and low power make these smart DACs an excellent choice for applications such as voltage margining and scaling, dc set-point for biasing and calibration, and waveform generation.
PART NUMBER | RESOLUTION | PACKAGE(1) |
---|---|---|
DAC63204W | 12-bit | YBH (DSBGA, 16) |
DAC53204W | 10-bit | YBH (DSBGA, 16) |
DATE | REVISION | NOTES |
---|---|---|
December 2022 | * | Initial Release |
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
A1 | VREF | Power | External
reference input. Connect a capacitor (approximately 0.1 μF) between
VREF and AGND. Use a pullup resistor to VDD when the external reference is not used. Do not ramp up this pin before VDD. In case an external reference is used, make sure the reference ramps up after VDD. |
A2 | OUT3 | Output | Analog output voltage from DAC channel 3. |
A3 | OUT2 | Output | Analog output voltage from DAC channel 2. |
A4 | GPIO/SDO | Input/Output | General-purpose input/output configurable as LDAC, PD, PROTECT, RESET, SDO, and STATUS. For STATUS and SDO, connect the pin to the IO voltage with an external pullup resistor. If unused, connect the GPIO pin to VDD or AGND using an external resistor. This pin can ramp up before VDD. |
B1 | VDD | Power | Supply voltage. |
B2 | FB3 | Input | Voltage feedback pin for channel 3. In voltage-output mode, connect to OUT3 for closed-loop amplifier output. In current-output mode, keep the FB3 pin unconnected to minimize leakage current. |
B3 | FB2 | Input | Voltage feedback pin for channel 2. In voltage-output mode, connect to OUT2 for closed-loop amplifier output. In current-output mode, keep the FB2 pin unconnected to minimize leakage current. |
B4 | SCL/SYNC | Output | I2C serial interface clock or SPI chip select input. Connect this to the IO voltage using an external pullup resistor. This pin can ramp up before VDD. |
C1 | AGND | Ground | Ground reference point for all circuitry on the device. |
C2 | FB0 | Input | Voltage feedback pin for channel 0. In voltage-output mode, connect to OUT0 for closed-loop amplifier output. In current-output mode, keep the FB0 pin unconnected to minimize leakage current. |
C3 | FB1 | Input | Voltage feedback pin for channel 1. In voltage-output mode, connect to OUT1 for closed-loop amplifier output. In current-output mode, keep the FB1 pin unconnected to minimize leakage current. |
C4 | A0/SDI | Input | Address
configuration pin for I2C or serial data input for SPI.
For A0, connect this pin to VDD, AGND, SDA, or SCL for address configuration (Section 7.5.2.2.1). For SDI, this pin need not be pulled up or pulled down. This pin can ramp up before VDD. |
D1 | CAP | Power | External bypass capacitor for the internal LDO. Connect a capacitor (approximately 1.5 μF) between CAP and AGND. |
D2 | OUT0 | Output | Analog output voltage from DAC channel 0. |
D3 | OUT1 | Output | Analog output voltage from DAC channel 1. |
D4 | SDA/SCLK | Input/Output | Bidirectional I2C serial data bus or SPI clock input. Connect this pinto the IO voltage using an external pullup resistor in I2C mode. This pin can ramp up before VDD. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VDD | Supply voltage, VDD to AGND | –0.3 | 6 | V |
Digital inputs to AGND | –0.3 | VDD + 0.3 | V | |
VFBX to AGND | –0.3 | VDD + 0.3 | V | |
VOUTX to AGND | –0.3 | VDD + 0.3 | V | |
VREF | External reference, VREF to AGND | –0.3 | VDD + 0.3 | V |
Current into any pin except the OUTx, VDD, and AGND pins | –10 | 10 | mA | |
TJ | Junction temperature | –40 | 150 | °C |
Tstg | Storage temperature | –65 | 150 | °C |