SGLS386F January   2009  – October 2014 DAC5670-SP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 DC Electrical Characteristics
    6. 7.6 AC Electrical Characteristics
    7. 7.7 Digital Electrical Characteristics
    8. 7.8 Timing Requirements
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Digital Inputs
      2. 8.3.2 DLL Usage
      3. 8.3.3 Clock Input
      4. 8.3.4 DAC Transfer Function
      5. 8.3.5 Reference Operation
      6. 8.3.6 Analog Current Outputs
      7. 8.3.7 Sleep Mode
    4. 8.4 Device Functional Modes
      1. 8.4.1 Input Format
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
        1. 12.1.1.1 Definitions of Specifications and Terminology
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • GEM|192
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 14-Bit Resolution
  • 2.4-GSPS Max Update Rate DAC
  • Dual Differential Input Ports
    • Even/Odd Demultiplexed Data
    • Maximum 1.2 GSPS Each Port, 2.4 GSPS Total
    • Dual 14-Bit Inputs + 1 Reference Bit
    • DDR Output Clock
    • DLL Optimized Clock Timing Synchronized to Reference Bit
    • LVDS and HyperTransport™ Voltage Level Compatible
    • Internal 100-Ω Terminations for Data and Reference Bit Inputs
  • Selectable 2× Interpolation With Fs / 2 Mixing
  • Differential Scalable Current Outputs: 5 to 30 mA
  • On-Chip 1.2-V Reference
  • 3.3-V Analog Supply Operation
  • Power Dissipation: 2 W
  • 192-Ball CBGA (GEM) Package
  • QML-V Qualified, SMD 5962-07247
  • Military Temperature Range (–55°C to 125°C Tcase)

2 Applications

  • Test and Measurement: Arbitrary Waveform Generator
  • Communications
  • Engineering evaluation (/EM) samples are available (1)
(1) These units are intended for engineering evaluation only. They are processed to a non-compliant flow (that is, no burn-in, and so forth) and are tested to a temperature rating of 25°C only. These units are not suitable for qualification, production, radiation testing, or flight use. Parts are not warranted for performance over the full MIL specified temperature range of –55°C to 125°C or operating life.

3 Description

The DAC5670 is a 14-bit 2.4-GSPS DAC with dual demultiplexed differential input ports. The DAC5670 is clocked at the DAC sample rate and the two input ports run at a maximum of 1.2 GSPS. An additional reference bit input sequence is used to adjust the output clock delay to the data source, optimizing the internal data latching clock relative to this reference bit with a delay lock loop (DLL). Alternatively, the DLL may be bypassed and the timing interface managed by controlling DATA setup and hold timing to DLYCLK.

The DAC5670 can also accept data up to 1.2 GSPS using only the A input port. In the single port modes, options include: repeating the input sample (A_ONLY mode), 2× interpolation by zero stuff (A_ONLY_ZS mode), or 2× interpolation by repeating and inverting the input sample (A_ONLY_INV). These modes are used to double the input sample rate up to 2.4 GSPS.

The DAC5670 operates with a single 3- to 3.6-V supply voltage. Power dissipation is 2 W at maximum operating conditions. The DAC5670 provides a nominal full-scale differential current-output of 20 mA, supporting both single-ended and differential applications. An on-chip 1.2-V temperature-compensated bandgap reference and control amplifier allows the user to adjust the full-scale output current from the nominal 20 mA to as low as 5 mA or as high as 30 mA.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
DAC5670-SP CBGA (192) 19.00 mm × 19.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

fbd_gls386.gif

4 Revision History

Changes from E Revision (December 2013) to F Revision

  • Added Handling Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Corrected Setup/Hold Data to DLYCLK values to be frequency independentGo
  • Updated DLL Usage sectionGo

Changes from D Revision (May 2013) to E Revision

  • Added /EM bullet to Applications sectionGo
  • Deleted Available Options tableGo