SLASEL1D June   2017  – August 2018 DAC60508 , DAC70508 , DAC80508

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Block Diagram
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Digital-to-Analog Converter (DAC) Architecture
        1. 8.3.1.1 DAC Transfer Function
        2. 8.3.1.2 Output Amplifiers
        3. 8.3.1.3 DAC Register Structure
          1. 8.3.1.3.1 DAC Register Synchronous and Asynchronous Updates
          2. 8.3.1.3.2 Broadcast DAC Register
          3. 8.3.1.3.3 CLEAR Operation (DACx0508C only)
      2. 8.3.2 Internal Reference
        1. 8.3.2.1 Reference Divider
        2. 8.3.2.2 Solder Heat Reflow
      3. 8.3.3 Device Reset Options
        1. 8.3.3.1 Power-on-Reset (POR)
        2. 8.3.3.2 Software Reset
    4. 8.4 Device Functional Modes
      1. 8.4.1 Stand-Alone Operation
      2. 8.4.2 Daisy-Chain Operation
      3. 8.4.3 Frame Error Checking
      4. 8.4.4 Power-Down Mode
    5. 8.5 Programming
    6. 8.6 Register Map
      1. 8.6.1 NOP Register (address = 0x00) [reset = 0x0000]
        1. Table 9. NOP Register Field Descriptions
      2. 8.6.2 DEVICE ID Register (address = 0x01) [reset = 0x---]
        1. Table 10. DEVICE ID Field Descriptions
      3. 8.6.3 SYNC Register (address = 0x2) [reset = 0xFF00]
        1. Table 11. SYNC Register Field Descriptions
      4. 8.6.4 CONFIG Register (address = 0x3) [reset = 0x0000]
        1. Table 12. CONFIG Register Field Descriptions
      5. 8.6.5 GAIN Register (address = 0x04) [reset = 0x---]
        1. Table 13. GAIN Register Field Descriptions
      6. 8.6.6 TRIGGER Register (address = 0x05) [reset = 0x0000]
        1. Table 14. TRIGGER Register Field Descriptions
      7. 8.6.7 BRDCAST Register (address = 0x6) [reset = 0x0000]
        1. Table 15. BRDCAST Register Field Descriptions
      8. 8.6.8 STATUS Register (address = 0x7) [reset = 0x0000]
        1. Table 16. STATUS Register Field Descriptions
      9. 8.6.9 DACx Register (address = 0x8 to 0xF) [reset = 0x0000 or 0x8000]
        1. Table 17. DACx Register Field Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Interfacing to Microcontroller
      2. 9.1.2 Programmable Current Source Circuit
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The DACx0508 is a pin-compatible family of low power, eight-channel, buffered voltage-output, digital-to-analog converters (DACs) with 16-, 14- and 12-bit resolution. The DACx0508 includes a 2.5-V, 5-ppm/°C internal reference, eliminating the need for an external precision reference in most applications. A user selectable gain configuration provides full-scale output voltages of 1.25 V (gain = ½), 2.5 V (gain = 1) or 5 V (gain = 2). The device operates from a single 2.7-V to 5.5-V supply, is specified monotonic and provides high linearity of ±1 LSB INL.

Communication to the DACx0508 is performed through a serial interface that operates at clock rates up to 50 MHz. The VIO pin enables serial interface operation from 1.7 V to 5.5 V. The DACx0508 flexible interface enables operation with a wide range of industry-standard microprocessors and microcontrollers.

The DACx0508 incorporates a power-on-reset circuit that powers up and maintains the DAC outputs at either zero scale or midscale until a valid code is written to the device. The device consumes low current of 0.6 mA/channel at 5.5 V, making it suitable for battery-operated equipment. A per-channel power-down feature reduces the device current consumption to 15 µA.

The DACx0508 is characterized for operation over the temperature range of –40°C to 125°C and is available in small packages.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
DACx0508 WQFN (16) 3.00 mm × 3.00 mm
DSBGA (16) 2.40 mm x 2.40 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.