SLASF62 June 2024 DAC80516
ADVANCE INFORMATION
Refer to the PDF data sheet for device specific package drawings
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | OUT0 | Output | DAC output channel 0 |
2 | AVDD | Power | Analog power supply |
3 | SCL/CS | Input | I2C: Clock input. SPI: Active-low serial data enable. This input is the frame synchronization signal for the serial data. When the signal goes low, this pin enables the serial interface input shift register. |
4 | SDA/SCLK | Input/Output | I2C: Bidirectional data line SPI: Clock input |
5 | A0/SDI | Input | I2C: Target address selector SPI: Data input. Data are clocked into the input shift register on each falling edge of the SCLK pin. |
6 | FLEXIO | Input/Output | FLEXIO pin, including GPIO and CLEAR pin functionality |
7 | OUT8 | Output | DAC output channel 8 |
8 | OUT9 | Output | DAC output channel 9 |
9 | OUT10 | Output | DAC output channel 10 |
10 | OUT11 | Output | DAC output channel 11 |
11 | OUT12 | Output | DAC output channel 12 |
12 | OUT13 | Output | DAC output channel 13 |
13 | OUT14 | Output | DAC output channel 14 |
14 | OUT15 | Output | DAC output channel 15 |
15 | GND | Power | Ground reference point for all circuitry on the device |
16 | GND | Power | Ground reference point for all circuitry on the device |
17 | LDAC | Input | Active-low DAC synchronization signal. A high-to-low transition on the LDAC pin simultaneously updates the outputs configured in synchronous mode |
18 | VIO | Power | IO supply voltage. This pin sets the I/O operating voltage for the device. |
19 | A1/SDO | Input/Output | I2C: Target address selector. SPI: Data output. Data are clocked out of the input shift register on either rising or falling edges of the SCLK pin as specified by the FSDO bit. |
20 | RESET | Input | Active low reset input, logic low on this pin causes the device to initiate a reset event |
21 | REF | Input/Output | DAC voltage reference input/output. This pin acts as input pin REFIN by default (with internal reference disabled). If internal reference is enabled, this pin acts as output pin REFOUT. |
22 | OUT7 | Output | DAC output channel 7 |
23 | OUT6 | Output | DAC output channel 6 |
24 | OUT5 | Output | DAC output channel 5 |
25 | OUT4 | Output | DAC output channel 4 |
26 | OUT3 | Output | DAC output channel 3 |
27 | OUT2 | Output | DAC output channel 2 |
28 | OUT1 | Output | DAC output channel 1 |