SLASF62 June 2024 DAC80516
ADVANCE INFORMATION
Refer to the PDF data sheet for device specific package drawings
The device is I2C-compatible and the bus definitions are listed in Table 6-2.
CONDITION | SYMBOL | SOURCE | DESCRIPTION |
---|---|---|---|
START | S | Controller | Begins all bus transactions. A change in the state of the SDA line, from high to low, while the SCL line is high, defines a START condition. Each data transfer initiates with a START condition |
STOP | P | Controller | Terminates all transactions and resets bus. A change in the state of the SDA line from low to high while the SCL line is high defines a STOP condition. Each data transfer terminates with a repeated START or STOP condition. |
IDLE | I | Controller | Bus idle. Both SDA and SCL lines remain high. |
ACK (Acknowledge) | A | Controller/Target | Handshaking bit (low). Each receiving device, when addressed, is obliged to generate an acknowledge bit. A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a way that the SDA line is stable low during the high period of the acknowledge clock pulse. Take setup and hold times into account. |
NACK (Not Acknowledge) | A | Controller/Target | Handshaking bit (high). On a controller receive, data transfer termination can be signaled by the controller generating a not-acknowledge on the last byte that has been transmitted by the target. |
READ | R | Controller | Active-high bit that follows immediately after the target address sequence. Indicates that the controller is initiating the target-to-controller data transfer. The number of data bytes transferred between a START and a STOP condition is not limited and is determined by the controller device. The receiver acknowledges data transfer. |
WRITE | W | Controller | Active-low bit that follows immediately after the target address sequence. Indicates that the controller is initiating the controller-to-target data transfer. The number of data bytes transferred between a START and a STOP condition is not limited and is determined by the controller device. The receiver acknowledges data transfer. |
REPEATED START | Sr | Controller | Generated by controller, same function as the START condition (highlights the fact that STOP condition is not strictly necessary.) |
BLOCK ACCESS | B | Controller | Active-high bit that indicates the controller is initiating a block access data transfer. |