SLAS950A May   2013  – June 2015 DAC7562-Q1 , DAC7563-Q1 , DAC8162-Q1 , DAC8163-Q1 , DAC8562-Q1 , DAC8563-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
      1. 7.7.1 Tables of Graphs
      2. 7.7.2 Internal Reference
      3. 7.7.3 DAC at AVDD = 5.5 V
      4. 7.7.4 Typical Characteristics: DAC at AVDD = 3.6 V
      5. 7.7.5 Typical Characteristics: DAC at AVDD = 2.7 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Digital-to-Analog Converter (DAC)
        1. 8.3.1.1 Resistor String
        2. 8.3.1.2 Output Amplifier
      2. 8.3.2 Internal Reference
      3. 8.3.3 Power-On Reset
        1. 8.3.3.1 Power-On Reset to Zero-Scale
        2. 8.3.3.2 Power-On Reset to Mid-Scale
        3. 8.3.3.3 Power-On Reset (POR) Levels
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Modes
        1. 8.4.1.1 DAC Power-Down Commands
      2. 8.4.2 Gain Function
      3. 8.4.3 Software Reset Function
      4. 8.4.4 Internal Reference Enable Register
        1. 8.4.4.1 Enabling Internal Reference
        2. 8.4.4.2 Disabling Internal Reference
      5. 8.4.5 CLR Functionality
      6. 8.4.6 LDAC Functionality
    5. 8.5 Programming
      1. 8.5.1 SYNC Interrupt
      2. 8.5.2 DAC Register Configuration
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 DAC Internal Reference
        1. 9.1.1.1 Supply Voltage
        2. 9.1.1.2 Temperature Drift
        3. 9.1.1.3 Noise Performance
        4. 9.1.1.4 Load Regulation
          1. 9.1.1.4.1 Long-Term Stability
        5. 9.1.1.5 Thermal Hysteresis
      2. 9.1.2 DAC Noise Performance
    2. 9.2 Typical Applications
      1. 9.2.1 Combined Voltage and Current Analog Output Module Using the XTR300
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Up to ±15-V Bipolar Output Using the DAC8562-Q1
    3. 9.3 System Examples
      1. 9.3.1 MSP430 Microprocessor Interfacing
      2. 9.3.2 TMS320 McBSP Microprocessor Interfacing
      3. 9.3.3 OMAP-L1x Processor Interfacing
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Community Resource
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Power Supply Recommendations

These devices can operate within the specified supply voltage range of 2.7 V to 5.5 V. The power applied to AVDD should be well-regulated and low-noise. In order to further minimize noise from the power supplies, a strong recommendation is to include a pair of 100-pF and 1-nF capacitors and a 0.1-μF to 1-μF bypass capacitor. The current consumption of the AVDD pin, the short-circuit current limit, and the load current for these devices are listed in the Electrical Characteristics table. Choose the power supplies for these devices to meet the aforementioned current requirements.