DLPS247 August   2024 DLP472TP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1. 4.1 Pin Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Storage Conditions
    3. 5.3  ESD Ratings
    4. 5.4  Recommended Operating Conditions
    5.     12
    6. 5.5  Thermal Information
    7. 5.6  Electrical Characteristics
    8. 5.7  Switching Characteristics
    9. 5.8  Timing Requirements
    10.     17
    11. 5.9  System Mounting Interface Loads
    12.     19
    13. 5.10 Micromirror Array Physical Characteristics
    14.     21
    15. 5.11 Micromirror Array Optical Characteristics
    16.     23
    17. 5.12 Window Characteristics
    18. 5.13 Chipset Component Usage Specification
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Power Interface
      2. 6.3.2 LPSDR Low-Speed Interface
      3. 6.3.3 High-Speed Interface
      4. 6.3.4 Timing
    4. 6.4 Device Functional Modes
    5. 6.5 Optical Interface and System Image Quality Considerations
      1. 6.5.1 Numerical Aperture and Stray Light Control
      2. 6.5.2 Pupil Match
      3. 6.5.3 Illumination Overfill
    6. 6.6 Micromirror Array Temperature Calculation
    7. 6.7 Micromirror Power Density Calculation
    8. 6.8 Micromirror Landed-On/Landed-Off Duty Cycle
      1. 6.8.1 Definition of Micromirror Landed-On/Landed-Off Duty Cycle
      2. 6.8.2 Landed Duty Cycle and Useful Life of the DMD
      3. 6.8.3 Landed Duty Cycle and Operational DMD Temperature
      4. 6.8.4 Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Temperature Sensor Diode
  9. 8 Power Supply Recommendations
    1. 8.1 DMD Power Supply Power-Up Procedure
    2. 8.2 DMD Power Supply Power-Down Procedure
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Device Support
      1. 10.2.1 Device Nomenclature
      2. 10.2.2 Device Markings
    3. 10.3 Documentation Support
      1. 10.3.1 Related Documentation
    4. 10.4 Receiving Notification of Documentation Updates
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.1 Absolute Maximum Ratings

Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
MIN MAX UNIT
SUPPLY VOLTAGE
VDD Supply voltage for LVCMOS core logic and LPSDR low speed interface (1) -0.5 2.3 V
VDDI Supply voltage for SubLVDS receivers(1) -0.5 2.3 V
VOFFSET Supply voltage for HVCMOS and micromirror electrode(1)(2) -0.5 11 V
VBIAS Supply voltage for micromirror electrode(1) -0.5 19 V
VRESET Supply voltage for micromirror electrode(1) -15 0.5 V
|VDDI - VDD| Supply voltage delta, absolute value(3) 0.3 V
|VBIAS - VOFFSET| Supply voltage delta, absolute value(4) 11 V
|VBIAS - VRESET| Supply voltage delta, absolute value(5) 34 V
INPUT VOLTAGE
Input voltage for other inputs -- LSIF and LVCMOS(1) -0.5 VDD + 0.5 V
Input voltage for other inputs -- SubLVDS(1)(6) -0.5 VDDI + 0.5 V
SUBLVDS INTERFACE
|VID| SubLVDS input differential voltage (absolute value)(1)(6) 810 mV
IID SubLVDS input differential current 10 mA
CLOCK FREQUENCY
ƒclock Clock frequency for low speed interface LS_CLK 100 130 MHz
TEMPERATURE DIODE
ITEMP_DIODE Max current source into temperature diode 120 µA
ENVIRONMENTAL
TWINDOW and TARRAY Temperature, operating(7) 0 90 °C
Temperature, non-operating(7) -40 90 °C
|TDELTA| Absolute temperature delta between any point on the window edge and theceramic test point TP1(8) 30 °C
TDP Dew point temperature, operating and non–operating (noncondensing) 81 °C
(1) All voltage values are with respect to the ground terminals (VSS). The following required power supplies must be connected for proper DMD operation: VDD, VDDI, VOFFSET, VBIAS, and VRESET. All VSS connections are also required.
(2) VOFFSET supply transients must fall within specified voltages.
(3) Exceeding the recommended allowable absolute voltage difference between VDDI and VDD may result in excessive current draw and permanent damage to the device.
(4) Exceeding the recommended allowable absolute voltage difference between VBIAS and VOFFSET may result in excessive current draw and permanent damage to the device.
(5) Exceeding the recommended allowable absolute voltage difference between VBIAS and VRESET may result in excessive current draw and permanent damage to the device.
(6) This maximum input voltage rating applies when each input of a differential pair is at the same voltage potential. Sub-LVDS differential inputs must not exceed the specified limit or damage may result to the internal termination resistors.
(7) The highest temperature of the active array (as calculated using the Micromirror Array Temperature Calculation) or of any point along the window edge. The locations of thermal test points TP2, TP3, TP4, and TP5 are intended to measure the highest window edge temperature. If a particular application causes another point on the window edge to be at a higher temperature, that point should be used.
(8) Temperature delta is the highest difference between the ceramic test point 1 (TP1) and anywhere on the window edge. The window test points TP2, TP3, TP4, and TP5 are intended to result in the worst case delta. If a particular application causes another point on the window edge to result in a larger delta temperature, that point should be used.