DLPS163D April 2019 – December 2023 DLP660TE
PRODUCTION DATA
SIGNAL NAME | MINIMUM TRACE WIDTH TO PINS (MIL) | LAYOUT REQUIREMENT |
---|---|---|
GND | 15 | Maximize trace width to connecting pin |
DMD_P3P3V | 15 | Maximize trace width to connecting pin |
DMD_P1P8V | 15 | Maximize trace width to connecting pin |
VOFFSET | 15 | Create mini plane from U2 to U3 |
VRESET | 15 | Create mini plane from U2 to U3 |
VBIAS | 15 | Create mini plane from U2 to U3 |
All U3 control connections | 10 | Use 10 mil etch to connect all signals/voltages to DMD pads |