DLPS163D April 2019 – December 2023 DLP660TE
PRODUCTION DATA
TI recommends that the board has matched impedance of 50 Ω ±10% for all signals. The exceptions are listed in Table 9-2.
SIGNAL TYPE | SIGNAL NAME | IMPEDANCE (Ω) |
---|---|---|
A channel LVDS differential pairs | D_AP(0:15), D_AN(0:15) | 100 ±10% differential across each pair |
DCLKA_P, DCLKA_N | ||
SCTRL_AP, SCTRL_AN | ||
B channel LVDS differential pairs | D_BP(0:15), D_BN(0:15) | 100 ±10% differential across each pair |
DCLKB_P, DCLKB_N | ||
SCTRL_BP, SCTRL_BN | ||
C channel LVDS differential pairs | D_CP(0:15), D_CN(0:15) | 100 ±10% differential across each pair |
DCLKC_P, DCLKC_N | ||
SCTRL_CP, SCTRL_CN | ||
D channel LVDS differential pairs | D_DP(0:15), D_DN(0:15) | 100 ±10% differential across each pair |
DCLKD_P, DCLKD_N | ||
SCTRL_DP, SCTRL_DN |