DLPS015G april   2010  – june 2023 DLPA200

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Configurations Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics Control Logic
    6. 7.6  5-V Linear Regulator
    7. 7.7  Bias Voltage Boost Converter
    8. 7.8  Reset Voltage Buck-Boost Converter
    9. 7.9  VOFFSET/DMDVCC2 Regulator
    10. 7.10 Switching Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 5-V Linear Regulator
      2. 8.3.2 Bias Voltage Boost Converter
      3. 8.3.3 Reset Voltage Buck-Boost Converter
      4. 8.3.4 VOFFSET/DMDVCC2 Regulator
      5. 8.3.5 Serial Communications Port (SCP)
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Component Selection Guidelines
  11. 10Power Supply Recommendations
    1. 10.1 Power Supply Rail Guidelines
  12. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Grounding Guidelines
    2. 11.2 Thermal Considerations
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11.1 Layout Guidelines

CAUTION:

Board layout and routing guidelines must be followed explicitly and all external components used must be in the range of values and of the quality recommended for proper operation of the DLPA200.

CAUTION:

Thermal pads must be tied to VRESET_RAIL. Do not connect to ground.

Provide suitable Kelvin connections for the switching regulator feedback pins: VBIAS (pin 9) and VRESET (pin 13).

Make the PCB traces that connect the switching devices: VBIAS_SWL (pin 8) and VRESET_SWL (pin 12) as short and wide as possible to minimize leakage inductances. Make the PCB traces that connect the switching converter components (inductors, flywheel diodes and filtering capacitors) as short and wide as possible. Ensure that the electrical loops that these components form are as small and compact as possible, with the ground referenced components forming a star connection.

Due to the fast switching transitions appearing on the sixteen reset OUTx pins, it is recommended to keep these traces as short as possible. Also, to minimize potential cross-talk between outputs, it is advisable to maintain as much clearance between each of the output traces.