DLPS227A october   2021  – june 2023 DLPA300

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics Control Logic
    6. 6.6  5-V Linear Regulator
    7. 6.7  Bias Voltage Boost Converter
    8. 6.8  Reset Voltage Buck-Boost Converter
    9. 6.9  VOFFSET Regulator
    10. 6.10 Switching Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 5-V Linear Regulator
      2. 7.3.2 Bias Voltage Boost Converter
      3. 7.3.3 Reset Voltage Buck-Boost Converter
      4. 7.3.4 VOFFSET Regulator
      5. 7.3.5 Serial Communications Port (SCP)
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Component Selection Guidelines
      3. 8.2.3 Application Curves
  10. Power Supply Recommendations
    1. 9.1 Power Supply Rail Guidelines
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Grounding Guidelines
    2. 10.2 Thermal Considerations
  12. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Device Support
      1. 11.2.1 Device Nomenclature
    3. 11.3 Documentation Support
      1. 11.3.1 Related Documentation
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Support Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PFP|80
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Power Supply Rail Guidelines

Table 8-1 through Table 8-4 provides discrete component selection guidelines.

  • Ensure that the P12V filter and bypass capacitors are distributed and connected to pin 11 and pin 48 and pin 50. Place these capacitors as close to their respective pins as possible and if necessary, place on the bottom layer.
  • The V5REG filter and bypass capacitors must be placed near and connected to pin 47.
  • It is best to route the VBIAS_RAIL etch runs in the following order: pin 40, pin 31, pin 30, pin 21, pin 80, pin 71, pin 70, and pin 61. Ensure that the etch runs are short and direct as they must carry 35 ns current spikes of up to 0.64 A (peak). Locate the bypass capacitors near and connected to pin 30 and pin 71 to provide bypassing on both sides.
  • The VBIAS_LHI filter and bypass capacitors must be placed near and connected to pin 10.
  • The VBIAS filter and bypass capacitors must be placed near and connected to pin 9.
  • VBIAS pin 9 must also be connected (optionally with a 0-ohm resistor) to VBIAS_RAIL at or between pins 21 and 80.
  • Route the VRESET_RAIL etch runs in the following order: pin 36, pin 35, pin 26, pin 25, pin 76, pin 75, pin 66, and pin 65. Ensure the etch runs are short and direct as they must carry 35 ns current spikes of up to 0.64 A (peak). Bypass capacitors must be placed near and connected to pins 35 and 66 to provide bypassing on both sides.
  • The VRESET filter and bypass capacitors must be located near and connected to pin 13. VRESET pin 13 must also be connected (optionally with a 0-Ω resistor) to VRESET_RAIL at or between pin 25 and pin 76.
  • Route the VOFFSET_RAIL etch runs in the following order: pin 23, pin 28, pin 33, pin 38, pin 63, pin 68, pin 73, and pin 78. Ensure the etch runs are short and direct as they must carry 35 ns current spikes of up to 0.64 A (peak). Place the bypass capacitors near and connected to pin 28 and pin 73 to provide bypassing on both sides.
  • The VOFFSET filter and bypass capacitors must be placed near and connected to pin 49.
  • VOFFSET pin 49 must also be connected (optionally with a 0-Ω resistor) to VOFFSET_RAIL at or between pin 38 and pin 63.
Note:

Aluminum electrolytic capacitors may not be suitable for the DLPA300 application. At the switching frequencies used in the DLPA300 (up to 1.5 MHz), aluminum electrolytic capacitors drop significantly in capacitance and increase in ESR resulting in voltage spikes on the power supply rails, which could cause the device to shut down or perform in an unreliable manner.