DLPS052A October   2015  – September 2023 DLPA3000

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Description (cont.)
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 SPI Timing Parameters
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Supply and Monitoring
        1. 8.3.1.1 Supply
        2. 8.3.1.2 Monitoring
          1. 8.3.1.2.1 Block Faults
          2. 8.3.1.2.2 Low Battery and UVLO
          3. 8.3.1.2.3 Auto LED Turn Off Functionality
          4. 8.3.1.2.4 Thermal Protection
      2. 8.3.2 Illumination
        1. 8.3.2.1 Programmable Gain Block
        2. 8.3.2.2 LDO Illum
        3. 8.3.2.3 Illumination Driver A
        4. 8.3.2.4 RGB Strobe Decoder
          1. 8.3.2.4.1 Break Before Make (BBM)
          2. 8.3.2.4.2 Openloop Voltage
          3. 8.3.2.4.3 Transient Current Limit
        5. 8.3.2.5 Illumination Monitoring
          1. 8.3.2.5.1 Power Good
          2. 8.3.2.5.2 Ratio Metric Overvoltage Protection
        6. 8.3.2.6 Load Current and Supply Voltage
        7. 8.3.2.7 Illumination Driver Plus Power FETS Efficiency
      3. 8.3.3 DMD Supplies
        1. 8.3.3.1 LDO DMD
        2. 8.3.3.2 DMD HV Regulator
          1. 8.3.3.2.1 Power-Up and Power-Down Timing
        3. 8.3.3.3 DMD/DLPC Buck Converters
        4. 8.3.3.4 DMD Monitoring
          1. 8.3.3.4.1 Power Good
          2. 8.3.3.4.2 Overvoltage Fault
      4. 8.3.4 Buck Converters
        1. 8.3.4.1 LDO Bucks
        2. 8.3.4.2 General Purpose Buck Converters
        3. 8.3.4.3 Buck Converter Monitoring
          1. 8.3.4.3.1 Power Good
          2. 8.3.4.3.2 Overvoltage Fault
        4. 8.3.4.4 Buck Converter Efficiency
      5. 8.3.5 Auxiliary LDOs
      6. 8.3.6 Measurement System
      7. 8.3.7 Digital Control
        1. 8.3.7.1 SPI
        2. 8.3.7.2 Interrupt
        3. 8.3.7.3 Fast-Shutdown in Case of Fault
    4. 8.4 Device Functional Modes
    5. 8.5 Register Maps
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Application Setup Using DLPA3000
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Typical Application with DLPA3000 Internal Block Diagram
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 SPI Connections
    4. 11.4 RLIM Routing
    5. 11.5 LED Connection
    6. 11.6 Thermal Considerations
  13. 12Device and Documentation Support
    1. 12.1 Third-Party Products Disclaimer
    2. 12.2 Device Support
      1. 12.2.1 Device Nomenclature
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Support Resources
    6. 12.6 Trademarks
    7. 12.7 Support Resources
    8. 12.8 Electrostatic Discharge Caution
    9. 12.9 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11.1 Layout Guidelines

For switching power supplies, the layout is an important step in the design process, especially when it concerns high-peak currents and high-switching frequencies. If the layout is not carefully done, the regulator could show stability issues and/or EMI problems. Therefore, it is recommended to use wide- and short-traces for high-current paths and for their return power ground paths. The input capacitor, output capacitor, and inductor should be placed as near as possible to the IC. In order to minimize ground noise coupling between different buck converters, it is advised to separate their grounds and connect them together at a central point under the part.

The high currents of the buck converters concentrate around pins VIN, SWITCH and PGND (Figure 11-1). The voltage at the pins VIN, PGND, and FB are DC voltages while the pin SWITCH has a switching voltage between VIN and PGND. In case the FET between pins 63 and 64 is closed, the red line indicates the current flow while the blue line indicates the current flow when the FET between pins 62 and 63 is closed. These paths carry the highest currents and must be kept as short as possible.

GUID-20230612-SS0I-DQXG-7TCR-PVTJQWSCHMLT-low.gif Figure 11-1 High AC Current Paths in a Buck Converter

The trace to the VIN pin carries high AC currents. Therefore, the trace should be low-resistive to prevent voltage drop across the trace. Additionally, the decoupling capacitors should be placed as near to the VIN pin as possible.

The SWITCH pin is connected alternately to the VIN or GND. This means a square wave voltage is present on the SWITCH pin with an amplitude of VIN and containing high frequencies. This can lead to EMI problems if not properly handled. To reduce EMI problems a snubber network (RSN6 and CSN6) is placed at the SWITCH pin to prevent and/or suppress unwanted high-frequency ringing at the moment of switching.

The PGND pin sinks high current and should be connected to a star ground point such that it does not interfere with other ground connections.

The FB pin is the sense connection for the regulated output voltage, which is a DC voltage; no current is flowing through this pin. The voltage on the FB pin is compared with the internal reference voltage in order to control the loop. The FB connection should be made at the load such that I•R drop is not affecting the sensed voltage.