DLPS052A October 2015 – September 2023 DLPA3000
PRODUCTION DATA
Register Address, Default, R/W, Register name. Boldface settings are the hardwired defaults.
NAME | BITS | DESCRIPTION | |||
---|---|---|---|---|---|
0x00, D3, R/W, Chip Identification | |||||
CHIPID | [7:4] | Chip identification number: D (hex) | |||
REVID | [3:0] | Revision number, 3 (hex) | |||
0x01, 82, R/W, Enable Register | |||||
FAST_SHUTDOWN_EN | [7] | 0: Fast shutdown disabled 1: Fast shutdown enabled |
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CW_EN | [6] | Reserved, value default as 0 | |||
BUCK_GP3_EN | [5] | Reserved, value default as 0 | |||
BUCK_GP2_EN | [4] | 0: General purpose buck2
disabled 1: General purpose buck2 enabled |
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BUCK_GP1_EN | [3] | Reserved, value default as 0 | |||
ILLUM_LED_AUTO_OFF_EN | [2] | 0: Illum_led_auto_off_en
disabled 1: Illum_led_auto_off_en enabled |
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ILLUM_EN | [1] | 0: Illum regulators disabled 1: Illum regulators enabled |
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DMD_EN | [0] | 0: DMD regulators disabled 1: DMD regulators enabled |
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0x02, 70, R/W, IREG Switch Control | |||||
TBD | [7] | Reserved, value does not matter. | |||
ILLUM_ILIM | [6:3] | Rlim voltage top-side (mV). Illum current limit = Rlim voltage / Rlim | |||
0000: 17 | 1000: 73 | ||||
0001: 20 | 1001: 88 | ||||
0010: 23 | 1010: 102 | ||||
0011: 25 | 1011: 117 | ||||
0100: 29 | 1100: 133 | ||||
0101: 37 | 1101: 154 | ||||
0110: 44 | 1110: 176 | ||||
0111: 59 | 1111: 197 | ||||
ILLUM_SW_ILIM_EN | [2:0] | Bit2: CH3, MOSFET R transient current
limit (0:disabled, 1:enabled) Bit1: CH2, MOSFET Q transient current limit (0:disabled, 1:enabled) Bit0: CH1, MOSFET P transient current limit (0:disabled, 1:enabled) |
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0x03, 00, R/W, SW1_IDAC(1) | |||||
TBD | [7:2] | Reserved, value does not matter. | |||
SW1_IDAC<9:8> | [1:0] | Led current of CH1(A) = ((Bit value +
1)/1024) × (150 mV / Rlim), Most significant bits of 10 bits
register (register 0x03 and 0x04). 00 0000 0000 [OFF] 00 0011 0011 [(52/1024) × (150mV/Rlim)], Minimum code. …. 11 1111 1111 [150mV/Rlim] |
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0x04, 00, R/W, SW1_IDAC(2) | |||||
SW1_IDAC<7:0> | [7:0] | Led current of CH1(A) = ((Bit value +
1)/1024) × (150 mV / Rlim), Least significant bits of 10 bits
register (register 0x03 and 0x04). 00 0000 0000 [OFF] 00 0011 0011 [(52/1024) × (150mV/Rlim)], Minimum code. …. 11 1111 1111 [150mV/Rlim] |
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0x05, 00, R/W, SW2_IDAC(1) | |||||
TBD | [7:2] | Reserved, value does not matter. | |||
SW2_IDAC<9:8> | [1:0] | Led current of CH2(A) = ((Bit value +
1)/1024) × (150 mV / Rlim), Most significant bits of 10 bits
register (register 0x05 and 0x06). 00 0000 0000 [OFF] 00 0011 0011 [(52/1024) × (150mV/Rlim)], Minimum code. …. 11 1111 1111 [150mV/Rlim] |
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0x06, 00, R/W, SW2_IDAC(2) | |||||
SW2_IDAC<7:0> | [7:0] | Led current of CH2(A) = ((Bit value +
1)/1024) × (150 mV / Rlim), Least significant bits of 10 bits
register (register 0x05 and 0x06). 00 0000 0000 [OFF] 00 0011 0011 [(52/1024) × (150mV/Rlim)], Minimum code. …. 11 1111 1111 [150mV/Rlim] |
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0x07, 00, R/W, SW3_IDAC(1) | |||||
TBD | [7:2] | Reserved, value does not matter. | |||
SW3_IDAC<9:8> | [1:0] | Led current of CH3(A) = ((Bit value +
1)/1024) × (150 mV / Rlim), Most significant bits of 10 bits
register (register 0x07 and 0x08). 00 0000 0000 [OFF] 00 0011 0011 [(52/1024) × (150mV/Rlim)], Minimum code. …. 11 1111 1111 [150mV/Rlim] |
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0x08, 00, R/W, SW3_IDAC(2) | |||||
SW3_IDAC<7:0> | [7:0] | Led current of CH3(A) = ((Bit value +
1)/1024) × (150 mV / Rlim), Least significant bits of 10 bits
register (register 0x07 and 0x08). 00 0000 0000 [OFF] 00 0011 0011 [(52/1024) × (150mV/Rlim)], Minimum code. …. 11 1111 1111 [150mV/Rlim] |
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0x0C, 00, R, Main Status Register | |||||
SUPPLY_FAULT | [7] | 0: No PG or OV failures for any of
the LV Supplies 1: PG failures for a LV Supplies |
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ILLUM_FAULT | [6] | 0: ILLUM_FAULT = LOW 1: ILLUM_FAULT = HIGH |
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PROJ_ON_INT | [5] | 0: PROJ_ON = HIGH 1: PROJ_ON = LOW |
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DMD_FAULT | [4] | 0: DMD_FAULT = LOW 1: DMD_FAULT = HIGH |
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BAT_LOW_SHUT | [3] | 0: VIN >
UVLO_SEL<4:0> 1: VIN < UVLO_SEL<4:0> |
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BAT_LOW_WARN | [2] | 0: VIN >
LOWBATT_SEL<4:0> 1: VIN < LOWBATT_SEL<4:0> |
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TS_SHUT | [1] | 0: Chip temperature < 132.5°C and
no violation in V5V0 1: Chip temperature > 156.5°C, or violation in V5V0 |
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TS_WARN | [0] | 0: Chip temperature <
121.4°C 1: Chip temperature > 123.4°C |
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0x0D, F5, Interrupt Mask Register | |||||
SUPPLY_FAULT_MASK | [7] | 0: Not masked for SUPPLY_FAULT
interrupt 1: Masked for SUPPLY_FAULT interrupt |
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ILLUM_FAULT_MASK | [6] | 0: Not masked for ILLUM_FAULT
interrupt 1: Masked for ILLUM_FAULT interrupt |
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PROJ_ON_INT_MASK | [5] | 0: Not masked for PROJ_ON_INT
interrupt 1: Masked for PROJ_ON_INT interrupt |
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DMD_FAULT_MASK | [4] | 0: Not masked for DMD_FAULT
interrupt 1: Masked for DMD_FAULT interrupt |
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BAT_LOW_SHUT_MASK | [3] | 0: Not masked for BAT_LOW_SHUT
interrupt 1: Masked for BAT_LOW_SHUT interrupt |
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BAT_LOW_WARN_MASK | [2] | 0: Not masked for BAT_LOW_WARN
interrupt 1: Masked for BAT_LOW_WARN interrupt |
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TS_SHUT_MASK | [1] | 0: Not masked for TS_SHUT
interrupt 1: Masked for TS_SHUT interrupt |
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TS_WARN_MASK | [0] | 0: Not masked for TS_WARN interrupt 1: Masked for TS_WARN interrupt |
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0x27, 00, R, Detailed status register1 (Power good failures for general purpose and illumination blocks) | |||||
BUCK_GP3_PG_FAULT | [7] | Reserved, value default as 0 | |||
BUCK_GP1_PG_FAULT | [6] | Reserved, value default as 0 | |||
BUCK_GP2_PG_FAULT | [5] | 0: No fault 1: General purpose buck2 power good failure. Does not initiate a fast shutdown. |
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Reserved | [4] | ||||
ILLUM_BC1_PG_FAULT | [3] | 0: No fault 1: Illum buck converter1 power good failure. Does not initiate a fast shutdown. |
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ILLUM_BC2_PG_FAULT | [2] | 0: No fault 1: Illum buck converter2 power good failure. Does not initiate a fast shutdown. |
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TBD | [1] | Reserved, value always 0 | |||
TBD | [0] | Reserved, value always 0 | |||
0x28, 00, R, Detailed status register2 (Overvoltage failures for general purpose and illum blocks) | |||||
BUCK_GP3_OV_FAULT | [7] | Reserved, value default as 0 | |||
BUCK_GP1_OV_FAULT | [6] | Reserved, value default as 0 | |||
BUCK_GP2_OV_FAULT | [5] | 0: No fault 1: General purpose buck2 overvoltage failure. Does not initiate a fast shutdown. |
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TBD | [4] | Reserved, value always 0 | |||
ILLUM_BC1_OV_FAULT | [3] | 0: No fault 1: Illum buck converter1 overvoltage failure. Does not initiate a fast shutdown. |
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ILLUM_BC2_OV_FAULT | [2] | 0: No fault 1: Illum buck converter2 overvoltage failure. Does not initiate a fast shutdown. |
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TBD | [1] | Reserved, value always 0 | |||
TBD | [0] | Reserved, value always 0 | |||
0x29, 00, R, Detailed status register3 (Power good failure for DMD related blocks) | |||||
TBD | [7] | Reserved, value always 0 | |||
DMD_PG_FAULT | [6] | 0: No fault 1: VBIAS, VOFS and/or VRST power good failure. Initiates a fast shutdown. |
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BUCK_DMD1_PG_FAULT | [5] | 0: No fault 1: Buck1 (used to create DMD voltages) power good failure. Initiates a fast shutdown. |
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BUCK_DMD2_PG_FAULT | [4] | 0: No fault 1: Buck2 (used to create DMD voltages) power good failure. Initiates a fast shutdown. |
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TBD | [3] | Reserved, value always 0 | |||
TBD | [2] | Reserved, value always 0 | |||
LDO_GP1_PG_FAULT / LDO_DMD1_PG_FAULT |
[1] | 0: No fault 1: LDO1 (used as general purpose or DMD specific LDO) power good failure. Initiates a fast shutdown. |
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LDO_GP2_PG_FAULT / LDO_DMD2_PG_FAULT |
[0] | 0: No fault 1: LDO2 (used as general purpose or DMD specific LDO) power good failure. Initiates a fast shutdown. |
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0x2A, 00, R, Detailed status register4 (Overvoltage failures for DMD related blocks and Color Wheel) | |||||
TBD | [7] | Reserved, value always 0 | |||
TBD | [6] | Reserved, value always 0 | |||
BUCK_DMD1_OV_FAULT | [5] | 0: No fault 1: Buck1 (used to create DMD voltage) overvoltage failure |
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BUCK_DMD2_OV_FAULT | [4] | 0: No fault 1: Buck2 (used to create DMD voltage) overvoltage failure |
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TBD | [3] | Reserved, value always 0 | |||
TBD | [2] | Reserved, value always 0 | |||
LDO_GP1_OV_FAULT / LDO_DMD1_OV_FAULT |
[1] | 0: No fault 1: LDO1 (used as general purpose or DMD specific LDO) overvoltage failure |
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LDO_GP2_OV_FAULT / LDO_DMD2_OV_FAULT |
[0] | 0: No fault 1: LDO2 (used as general purpose or DMD specific LDO) overvoltage failure |