DLPS240A June 2024 – August 2024 DLPA3085
PRODUCTION DATA
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
N/C | 1 | — | No connect |
DRST_LS_IND | 2 | I/O | Connection for the DMD SMPS-inductor (low-side switch) |
DRST_5P5V | 3 | O | Filter pin for LDO DMD. Power supply for internal DMD reset regulator, typical 5.5V |
DRST_PGND | 4 | GND | Power ground for DMD SMPS. Connect to ground plane. |
DRST_VIN | 5 | POWER | Power supply input for LDO DMD. Connect to system power. |
DRST_HS_IND | 6 | I/O | Connection for the DMD SMPS-inductor (high-side switch) |
ILLUM_5P5 V | 7 | O | Filter pin for LDO ILLUM. Power supply for internal ILLUM block, typical 5.5V |
ILLUM_VIN | 8 | POWER | Supply input of LDO ILLUM. Connect to system power. |
CH1_SWITCH | 9 | I | Low-side MOSFET switch for LED Cathode. Connect to RGB LED assembly. |
CH1_SWITCH | 10 | I | Low-side MOSFET switch for LED Cathode. Connect to RGB LED assembly. |
RLIM_1 | 11 | O | Connection to LED current sense resistor for CH1 and CH2 |
RLIM_BOT_K_2 | 12 | I | Kelvin sense connection to ground side of LED current sense resistor |
RLIM_K_2 | 13 | I | Kelvin sense connection to top side of current sense resistor |
RLIM_BOT_K_1 | 14 | I | Kelvin sense connection to ground side of LED current sense resistor |
RLIM_K_1 | 15 | I | Kelvin sense connection to top side of current sense resistor |
RLIM_1 | 16 | O | Connection to LED current sense resistor for CH1 and CH2 |
CH2_SWITCH | 17 | I | Low-side MOSFET switch for LED cathode. Connect to RGB LED assembly. |
CH2_SWITCH | 18 | I | Low-side MOSFET switch for LED cathode. Connect to RGB LED assembly. |
CH1_GATE_CTRL | 19 | O | Gate control of CH1 external MOSFET switch for LED cathode |
CH2_GATE_CTRL | 20 | O | Gate control of CH2 external MOSFET switch for LED cathode |
CH3_GATE_CTRL | 21 | O | Gate control of CH3 external MOSFET switch for LED cathode |
RLIM_2 | 22 | O | Connection to LED current sense resistor for CH3 |
RLIM_2 | 23 | O | Connection to LED current sense resistor for CH3 |
CH3_SWITCH | 24 | I | Low-side MOSFET switch for LED Cathode. Connect to RGB LED assembly. |
CH3_SWITCH | 25 | I | Low-side MOSFET switch for LED Cathode. Connect to RGB LED assembly. |
ILLUM_HSIDE_DRIVE | 26 | O | Gate control for external high-side MOSFET for ILLUM Buck converter |
ILLUM_LSIDE_DRIVE | 27 | O | Gate control for external low-side MOSFET for ILLUM Buck converter |
ILLUM_A_BOOST | 28 | I | Supply voltage for high-side N-channel MOSFET gate driver. A 100nF capacitor (typical) must be connected between this pin and ILLUM_A_SW. |
ILLUM_A_FB | 29 | I | Input to the buck converter loop controlling ILED |
ILLUM_A_VIN | 30 | POWER | Power input to the ILLUM Driver A |
ILLUM_A_SW | 31 | I/O | Switch node connection between high-side NFET and low-side NFET. Serves as a common connection for the flying high side FET driver |
ILLUM_A_PGND | 32 | GND | Ground connection to the ILLUM Driver A |
ILLUM_B_BOOST | 33 | I | Supply voltage for high-side N-channel MOSFET gate driver |
ILLUM_B_VIN | 34 | POWER | Power input to the ILLUM driver B |
ILLUM_B_FB | 35 | I | Input to the buck converter loop controlling ILED |
ILLUM_B_SW | 36 | I/O | Switch node connection between high-side NFET and low-side NFET |
ILLUM_B_PGND | 37 | GND | Ground connection to the ILLUM driver B |
ILLUM_A_COMP1 | 38 | I/O | Connection node for feedback loop components |
ILLUM_A_COMP2 | 39 | I/O | Connection node for feedback loop components |
ILLUM_B_COMP1 | 40 | I/O | Connection node for feedback loop components |
ILLUM_B_COMP2 | 41 | I/O | Connection node for feedback loop components |
THERMAL_PAD | 42 | GND | Thermal pad. Connect to a clean system ground. |
CLK_OUT | 43 | O | No connect. Reserved for color wheel clock output |
CW_SPEED_PWM_OUT | 44 | O | No connect. Reserved for color wheel PWM output |
SPI_VIN | 45 | I | Supply for SPI interface |
SPI_CLK | 46 | I | SPI clock input |
SPI_MISO | 47 | O | SPI data output |
SPI_SS_Z | 48 | I | SPI chip select (active low) |
SPI_MOSI | 49 | I | SPI data input |
PWR7_BOOST | 50 | I | No connect. Reserved for general purpose buck converter. Charge-pump-supply input for the high-side FET gate drive circuit. Connect a 100nF capacitor between PWR7_BOOST and PWR7_SWITCH pins. |
PWR7_FB | 51 | I | No connect. Reserved for general purpose buck converter. Converter feedback input. Connect to converter output voltage. |
PWR7_VIN | 52 | POWER | No connect. Reserved for general purpose buck converter. Power supply input for converter |
PWR7_SWITCH | 53 | I/O | No connect. Reserved for general purpose buck converter. Switch node connection between high-side NFET and low-side NFET |
PWR7_PGND | 54 | GND | No connect. Reserved for general purpose buck converter. Ground pin. Power ground return for switching circuit |
PROJ_ON | 55 | I | Input signal to enable and or disable the IC and DLP projector |
ACMPR_LABB_SAMPLE | 56 | I | Control signal to sample voltage at ACMPR_IN_LABB. Needs to connect a pull-down 10kΩ resistor to ground when the pin is not used. |
RESET_Z | 57 | O | Reset output to the DLP system (active low). The pin is held low to reset DLP system. |
INT_Z | 58 | O | Interrupt output signal (open drain, active low). Connect to the pullup resistor. |
DGND | 59 | GND | Digital ground. Connect to ground plane. |
CH_SEL_0 | 60 | I | Control signal to enable either of CH1,2,3 |
CH_SEL_1 | 61 | I | Control signal to enable either of CH1,2,3 |
PWR6_PGND | 62 | GND | Ground pin. Power ground return for switching circuit |
PWR6_SWITCH | 63 | I/O | Switch node connection between high-side NFET and low-side NFET |
PWR6_VIN | 64 | POWER | Power supply input for converter |
PWR6_BOOST | 65 | I | Charge-pump-supply input for the high-side FET gate drive circuit. Connect a 100nF capacitor between PWR6_BOOST and PWR6_SWITCH pins. |
PWR6_FB | 66 | I | Converter feedback input. Connect to output voltage. |
PWR5_VIN | 67 | POWER | No connect. Reserved for general purpose buck converter. Power supply input for converter |
PWR5_SWITCH | 68 | I/O | No connect. Reserved for general purpose buck converter. Switch node connection between high-side NFET and low-side NFET |
PWR5_BOOST | 69 | I | No connect. Reserved for general purpose buck converter. Charge-pump-supply input for the high-side FET gate drive circuit. Connect 100nF capacitor between PWR5_BOOST and PWR5_SWITCH pins. |
PWR5_PGND | 70 | GND | No connect. Reserved for general purpose buck converter. Ground pin. Power ground return for switching circuit |
PWR5_FB | 71 | I | No connect. Reserved for general purpose buck converter. Converter feedback input. Connect to output voltage. |
PWR2_FB | 72 | I | Converter feedback input. Connect to output voltage. |
PWR2_PGND | 73 | GND | Ground pin. Power ground return for switching circuit |
PWR2_SWITCH | 74 | I/O | Switch node connection between high-side NFET and low-side NFET |
PWR2_VIN | 75 | POWER | Power supply input for converter |
PWR2_BOOST | 76 | I | Charge-pump-supply input for the high-side FET gate drive circuit. Connect a 100nF capacitor between PWR2_BOOST and PWR2_SWITCH pins. |
ACMPR_IN_1 | 77 | I | Reserved. Input for analog sensor signal. No connect when the pin is not used. |
ACMPR_IN_2 | 78 | I | Input for analog sensor signal. No connect when the pin is not used. |
ACMPR_IN_3 | 79 | I | Input for analog sensor signal. No connect when the pin is not used. |
ACMPR_IN_LABB | 80 | I | Input for ambient light sensor, sampled input. No connect when the pin is not used. |
ACMPR_OUT | 81 | O | Analog comparator out. No connect when the pin is not used. |
ACMPR_REF | 82 | I | Reference voltage input for analog comparator. No connect when the pin is not used. |
PWR_VIN | 83 | POWER | Power supply input for LDO_Bucks. Connect to system power. |
PWR_5P5V | 84 | O | Filter pin for LDO_BUCKS. Internal analog supply for buck converters, typical 5.5V |
VINA | 85 | POWER | Input voltage supply pin for reference system |
AGND | 86 | GND | Analog ground pin |
PWR3_OUT | 87 | O | Filter pin for LDO_2 DMD/DLPC/AUX, typical 2.5V |
PWR3_VIN | 88 | POWER | Power supply input for LDO_2. Connect to system power. |
PWR4_OUT | 89 | O | Filter pin for LDO_1 DMD/DLPC/AUX, typical 3.3V |
PWR4_VIN | 90 | POWER | Power supply input for LDO_1. Connect to system power. |
SUP_2P5V | 91 | O | Filter pin for LDO_V2V5. Internal supply voltage, typical 2.5V |
SUP_5P0V | 92 | O | Filter pin for LDO_V5V. Internal supply voltage, typical 5V |
PWR1_PGND | 93 | GND | Ground pin. Power ground return for switching circuit |
PWR1_FB | 94 | I | Converter feedback input. Connect to output voltage. |
PWR1_SWITCH | 95 | I/O | Switch node connection between high-side NFET and low-side NFET |
PWR1_VIN | 96 | POWER | Power supply input for converter |
PWR1_BOOST | 97 | I | Charge-pump-supply input for the high-side FET gate drive circuit. Connect a 100nF capacitor between PWR1_BOOST and PWR1_SWITCH pins. |
DMD_VOFFSET | 98 | O | VOFS output rail. Connect to ceramic capacitor. |
DMD_VBIAS | 99 | O | VBIAS output rail. Connect to ceramic capacitor. |
DMD_VRESET | 100 | O | VRESET output rail. Connect to ceramic capacitor. |