DLPS132
May 2018
DLPA4000
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
System Block Diagram
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
SPI Timing Parameters
7
Detailed Description
7.1
Overview
7.2
Functional Block Description
7.3
Feature Description
7.3.1
Supply and Monitoring
7.3.1.1
Supply
7.3.1.2
Monitoring
7.3.1.2.1
Block Faults
7.3.1.2.2
Low Battery and UVLO
7.3.1.2.3
Thermal Protection
7.3.2
Illumination
7.3.2.1
Programmable Gain Block
7.3.2.2
LDO Illumination
7.3.2.3
Illumination Driver A
7.3.2.4
External MOSFETs
7.3.2.4.1
Gate series resistor (RG)
7.3.2.4.2
Gate series diode (DG)
7.3.2.4.3
Gate parallel capacitance (CG)
7.3.2.5
RGB Strobe Decoder
7.3.2.5.1
Break Before Make (BBM)
7.3.2.5.2
Openloop Voltage
7.3.2.5.3
Transient Current Limit
7.3.2.6
Illumination Monitoring
7.3.2.6.1
Power Good
7.3.2.6.2
RatioMetric Overvoltage Protection
7.3.3
External Power MOSFET Selection
7.3.3.1
Threshold Voltage
7.3.3.2
Gate Charge and Gate Timing
7.3.3.3
On-resistance RDS(on)
7.3.4
DMD Supplies
7.3.4.1
LDO DMD
7.3.4.2
DMD HV Regulator
7.3.4.3
DMD/DLPC Buck Converters
7.3.4.4
DMD Monitoring
7.3.4.4.1
Power Good
7.3.4.4.2
Overvoltage Fault
7.3.5
Buck Converters
7.3.5.1
LDO Bucks
7.3.5.2
General Purpose Buck Converters
7.3.5.3
Buck Converter Monitoring
7.3.5.3.1
Power Good
7.3.5.3.2
Overvoltage Fault
7.3.6
Auxiliary LDOs
7.3.7
Measurement System
7.4
Device Functional Modes
7.5
Programming
7.5.1
SPI
7.5.2
Interrupt
7.5.3
Fast-Shutdown in Case of Fault
7.5.4
Protected Registers
7.5.5
Writing to EEPROM
7.6
Register Maps
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Component Selection for General-Purpose Buck Converters
8.3
System Example With DLPA4000 Internal Block Diagram
9
Power Supply Recommendations
9.1
Power-Up and Power-Down Timing
10
Layout
10.1
Layout Guidelines
10.1.1
LED Driver
10.1.1.1
PowerBlock Gate Control Isolation
10.1.1.2
VIN to PowerBlocks
10.1.1.3
Return Current from LEDs and RSense
10.1.1.4
RC Snubber
10.1.1.5
Capacitor Choice
10.1.2
General Purpose Buck 2
10.1.3
SPI Connections
10.1.4
RLIM Routing
10.1.5
LED Connection
10.2
Layout Example
10.3
Thermal Considerations
11
Device and Documentation Support
11.1
Device Support
11.1.1
Device Nomenclature
11.2
Receiving Notification of Documentation Updates
11.3
Community Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
12.1
Package Option Addendum
12.1.1
Packaging Information
Package Options
Mechanical Data (Package|Pins)
PFD|100
MPQF054B
Thermal pad, mechanical data (Package|Pins)
PFD|100
PPTD321
Orderable Information
dlps132_oa
Device Images
System Block Diagram