DLPS014F April   2010  – May 2018 DLPC200

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
    2.     Power and Ground Pins
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Handling Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  I/O Electrical Characteristics
    6. 6.6  Video Input Pixel Interface Timing Requirements
    7. 6.7  I2C Interface Timing Requirements
    8. 6.8  USB Read Interface Timing Requirements
    9. 6.9  USB Write Interface Timing Requirements
    10. 6.10 SPI Slave Interface Timing Requirements
    11. 6.11 Parallel Flash Interface Timing Requirements
    12. 6.12 Serial Flash Interface Timing Requirements
    13. 6.13 Static RAM Interface Timing Requirements
    14. 6.14 DMD Interface Timing Requirements
    15. 6.15 DLPA200 Interface Timing Requirements
    16. 6.16 DDR2 SDR Memory Interface Timing Requirements
    17. 6.17 Video Input Pixel Interface – Image Sync and Blanking Requirements
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Frame Rates
    4. 7.4 Device Functional Modes
      1. 7.4.1 Video Modes
      2. 7.4.2 Structured Light Modes
        1. 7.4.2.1 Static Image Buffer Mode
        2. 7.4.2.2 Real Time Structured Light Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 DLPC200 System Interfaces
          1. 8.2.2.1.1  DLPC200 Master, I2C Interface for EDID Programming
          2. 8.2.2.1.2  USB Interface
          3. 8.2.2.1.3  Bus Protocol
          4. 8.2.2.1.4  SPI Slave Interface
          5. 8.2.2.1.5  Parallel Flash Memory Interface
          6. 8.2.2.1.6  Serial Flash Memory Interface
          7. 8.2.2.1.7  SRAM Interface
          8. 8.2.2.1.8  DDR2 SDR Memory Interface
          9. 8.2.2.1.9  Projector Image and Control Port Signals
          10. 8.2.2.1.10 SDRAM Memory
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
    1. 9.1 Power-Up Requirements
    2. 9.2 Power-Down Requirements
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Impedance Requirements
      2. 10.1.2 PCB Signal Routing
      3. 10.1.3 Fiducials
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Heat Sink
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Device Marking
    2. 11.2 Documentation Support
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from E Revision (August 2014) to F Revision

  • Updated system diagram Go
  • Added "(does not tristate)" to pin function entry SLAVE_SPI_MISOGo
  • Deleted the active low indicator in the SLAVE_SPI_ACK in SPI Slave Interface Timing RequirementsGo
  • Changed SPI Timing Figure to reflect that the SLAVE_SPI_MISO signal does not tristate Go
  • Changed SPI Timing Figure to reflect that SLAVE_SPI_ACK is an active high signalGo
  • Removed active low indicator from the SLAVE_SPI_ACK signal in SPI Slave InterfaceGo
  • Added clarifying note on the operation of the SLAVE_SPI_MOSI signal in SPI Slave InterfaceGo
  • Changed Numonyx to Micron (formerly Numonyx)Go
  • Added note regarding requiring separate programming files targeting 64 Mb and 128 Mb serial flash devicesGo
  • Changed 64 Mb Micron (formerly Numonyx) serial flash status to Obsolete Go
  • Changed 64 Mb Winbond serial flash status to Obsolete Go
  • Added Micron 128 Mb serial flashGo
  • Added Macronix 128 Mb serial flash and noted MCU 2.3.1 or greater requiredGo

Changes from D Revision (March 2012) to E Revision

  • Added Handling Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Updated descriptions in Pin Functions tableGo
  • Added Grounding scheme for Video Port 1 signals if not used Go
  • Added Grounding scheme for video port 2 signals if not used Go
  • Added Connection scheme for EDID and USB if not used Go
  • Added Connection scheme for LED illumination Control if not used Go
  • Added recommendation for 1-kΩ pullup to 3.3 V Go
  • Changed from "recommend grounding" to "recommend 10-kΩ pulldown to DGND" for RSVD_S1, RSVD_S2, RSVD_S3, RSVD_X11, RSVD_S20, and RSVD_S21Go
  • Changed description for RSVD_S0 from "do not connect" to "can be left open, recommend 10-kΩ pullup to 2.5 V"Go
  • Changed pin description for RSVD_x15 and RSVD_X13 from "do not connect" to "do not leave open, required: 49.4-Ω pullup to 1.8 V"Go
  • Changed pin description for RSVD_X14 and RSVD_X12 from "do not connect" to "do not leave open, required: 49.9-Ω pulldown to DGND"Go
  • Changed from "do not connect" to "can be left open, recommend 10-kΩ pullup to 1.8 V" for RSVD_S4Go
  • Changed pin description for RSVD_S18 and RSVD_S19 from "do not connect" to "can be left open, recommend 10-kΩ pullup to 2.5 V"Go
  • Deleted Case Temperature thermal resistanceGo
  • Changed Micron MT47H32M16-25E replaces now obsolete MT47H32M16RGo
  • Added Note about LED enabling after initilization is completeGo
  • Added Heat Sink sectionGo

Changes from C Revision (February 2012) to D Revision

Changes from B Revision (December 2010) to C Revision

  • Changed typo on pin number for PORT1_D10 PinGo
  • Changed typo on pin number for USB_CLK PinGo
  • Changed I/O type to B2 for USB interface data bus PinsGo
  • Added pin number A15 to PINFUNCTIONS tableGo
  • Changed I/O type to B2 for Flash/SRAM data PinsGo
  • Corrected the I/O type to O3 on CFG_CSO terminal pinGo
  • Added pin number AB17, U7, U8, and AD15 to Pin Functions tableGo
  • Changed location of Absolute Maximum Ratings and Recommended Operating Conditions Tables in documentGo
  • Changed MIN and MAX TJ values in Recommended Operating ConditionsGo
  • Added VCC33 and VREF_B2-4 pins to Recommended Operating ConditionsGo
  • Changed Input Port Interface figureGo
  • Changed SPI Slave Interface Timing Requirements tableGo
  • Added SPI Timing diagramGo
  • Changed RSTsignal timing in Parallel Flash Write Timing diagramGo
  • Changed signal notations in Serial Flash Interface Timing Requirements tableGo
  • Changed signal notations in Flash Memory Interface Timing diagramGo
  • Changed signal notations in DLPA200 I/F Timing diagramGo
  • Changed Typical Application diagramGo
  • Changed paragraph about read mode in Parallel Flash Memory InterfaceGo
  • Deleted SRAM Interface Timing diagram and provided reference to the OEM data sheetGo
  • Replaced "DAD" with "DLPA200"Go
  • Changed location of Device Marking in documentGo

Changes from A Revision (May 2010) to B Revision

  • Changed typo on pin number for MEM_D43 PinGo
  • Changed typo on pin number for MEM_D62 PinGo
  • Added part number used for EEPROMGo
  • Changed part number for Winbond partGo
  • Added new section for Power-Down RequirementsGo

Changes from * Revision (April 2010) to A Revision

  • Added / changed pin names, updated descriptions in Pin Functions table Go
  • Changed junction temperature and notated need for heat sinkGo
  • Deleted unused types, updated values in I/O Characteristics tableGo
  • Changed parameter names to match figureGo
  • Added new section for Power-Up RequirementsGo
  • Changed TI Lit Number from DLPS012 to DLPZ004 in Related DocumentsGo