The DLPC23x-Q1 ASIC Host/Diagnostic I2C port interface timing requirements are shown below.(1)(2) | MIN | MAX | UNIT |
---|
fclock | Clock frequency, HOST_I2C_SCL (50% reference points) | Fast-Mode | | 400 | kHz |
Standard Mode | | 100 |
CL | Capacitive Load (for each bus line) | | 200 | pF |
(1) Meets all I2C timing per the I2C Bus Specification (except for capacitive loading as specified above). For reference see version 2.1 of the Phillips/NXP specification.
(2) The maximum clock frequency does not account for rise time, nor added capacitance of PCB or external components which can adversely impact this value.