DLPS201E August   2020  – August 2024 DLPC230S-Q1 , DLPC231S-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Electrical Characteristics for Fixed Voltage I/O
    7. 5.7  DMD High-Speed SubLVDS Electrical Characteristics
    8. 5.8  DMD Low-Speed SubLVDS Electrical Characteristics
    9. 5.9  OpenLDI LVDS Electrical Characteristics
    10. 5.10 Power Dissipation Characterisics
    11. 5.11 System Oscillators Timing Requirements
    12. 5.12 Power Supply and Reset Timing Requirements
    13. 5.13 Parallel Interface General Timing Requirements
    14. 5.14 OpenLDI Interface General Timing Requirements
    15. 5.15 Parallel/OpenLDI Interface Frame Timing Requirements
    16. 5.16 Host/Diagnostic Port SPI Interface Timing Requirements
    17. 5.17 Host/Diagnostic Port I2C Interface Timing Requirements
    18. 5.18 Flash Interface Timing Requirements
    19. 5.19 TPS99000S-Q1 SPI Interface Timing Requirements
    20. 5.20 TPS99000S-Q1 AD3 Interface Timing Requirements
    21. 5.21 DLPC23xS-Q1 I2C Port Interface Timing Requirements
    22. 5.22 Chipset Component Usage Specification
  7. 6 Parameter Measurement Information
    1. 6.1 HOST_IRQ Usage Model
    2. 6.2 Input Source
      1. 6.2.1 Supported Input Sources
      2. 6.2.2 Parallel Interface Supported Data Transfer Formats
        1. 6.2.2.1 OpenLDI Interface Supported Data Transfer Formats
          1. 6.2.2.1.1 OpenLDI Interface Bit Mapping Modes
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Parallel Interface
      2. 7.3.2  OpenLDI Interface
      3. 7.3.3  DMD (SubLVDS) Interface
      4. 7.3.4  Serial Flash Interface
      5. 7.3.5  Serial Flash Programming
      6. 7.3.6  Host Command and Diagnostic Processor Interfaces
      7. 7.3.7  GPIO Supported Functionality
      8. 7.3.8  Built-In Self Test (BIST)
      9. 7.3.9  EEPROMs
      10. 7.3.10 Temperature Sensor
      11. 7.3.11 Debug Support
    4. 7.4 Device Functional Modes
      1. 7.4.1 Standby Mode
      2. 7.4.2 Display Mode
      3. 7.4.3 Calibration Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Head-Up Display
        1. 8.2.1.1 Design Requirements
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Supply Management
      2. 8.3.2 Hot Plug Usage
      3. 8.3.3 Power Supply Filtering
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1  PCB Layout Guidelines for Internal ASIC PLL Power
        2. 8.4.1.2  DLPC23xS-Q1 Reference Clock
          1. 8.4.1.2.1 Recommended Crystal Oscillator Configuration
        3. 8.4.1.3  DMD Interface Layout Considerations
        4. 8.4.1.4  General PCB Recommendations
        5. 8.4.1.5  General Handling Guidelines for Unused CMOS-Type Pins
        6. 8.4.1.6  Maximum Pin-to-Pin, PCB Interconnects Etch Lengths
        7. 8.4.1.7  Number of Layer Changes
        8. 8.4.1.8  Stubs
        9. 8.4.1.9  Terminations
        10. 8.4.1.10 Routing Vias
      2. 8.4.2 Thermal Considerations
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Device Nomenclature
        1. 9.1.2.1 Device Markings DLPC230-Q1 or DLPC230S-Q1
        2. 9.1.2.2 Device Markings DLPC231-Q1 or DLPC231S-Q1
        3. 9.1.2.3 Video Timing Parameter Definitions
    2. 9.2 Trademarks
    3. 9.3 Electrostatic Discharge Caution
    4. 9.4 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • ZEK|324
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MINNOMMAXUNIT
V(VCCK)Core power 1.1V (main 1.1V)±5% tolerance1.0451.11.155V
V(VCC11A_DDI_0)Core power 1.1V (External Filter Group A - HS DMD Interface 0)±8.18% tolerance(1)1.011.11.19V
V(VCC11A_DDI_1)Core power 1.1V (External Filter Group B - HS DMD Interface 1)±8.18% tolerance(1)1.011.11.19V
V(VCC11A_LVDS)Core power 1.1V (External Filter Group C - OpenLDI Interface)±8.18% tolerance(1)1.011.11.19V
V(VCC11AD_PLLM)MCG PLL 1.1V power (Analog/Digital)±8.18% tolerance(1)1.011.11.19V
V(VCC11AD_PLLD)DCG PLL 1.1V power (Analog/Digital)±8.18% tolerance(1)1.011.11.19V
V(VCC18IO)1.8V I/O power (Supports DMD Single-Ended LS interface I/O)±8.3% tolerance1.651.81.95V
V(VCC18A_LVDS)1.8V I/O power (Supports High-Speed and Low-Speed differential DMD interfaces)±8.3% tolerance1.651.81.95V
V(VCC3IO_MVGP)3/3V I/O power (Supports TPS99000S-Q1: SPI, interrupt, park, RESETZ, and LEDSEL interfaces±8.5% tolerance3.023.33.58V
V(VCC3IO_FLSH)3/3V I/O power (Supports serial flash interface)±8.5% tolerance3.023.33.58V
V(VCC3IO_INTF)3.3V I/O power (Supports: host command (SPI and I2C), parallel data interface, HOST_IRQ, and JTAG±8.5% tolerance3.023.33.58V
V(VCC3IO_OSC)3.3V I/O power (Supports Oscillator)±8.5% tolerance3.023.33.58V
V(VCC33A_LVDS)3.3V I/O power (Supports OpenLDI interface)±8.5% tolerance3.023.33.58V
V(VCC3IO)3.3V I/O power (Supports all remaining I/O including: GPIO, PMIC_AD3, TSTPT, ETM_TRACE, et cetera)±8.5% tolerance3.023.33.58V
TJOperating junction temperature–40125°C
TCOperating case temperature–40124°C
TAOperating ambient temperature(2)–40105°C
(1) These I/O supply ranges are wider to facilitate additional external filtering.
(2) Operating ambient temperature is dependent on system thermal design. Operating case temperature may not exceed its specified range across ambient temperature conditions.