DLPS223 Data sheet

DLPS223A December 2021 – February 2023 DLPC4430

PRODUCTION DATA

6.13 Programmable Output Clocks Switching Characteristics

over operating free air temperature range, C_L(min timing) = 5 pF, C_L(max timing) = 50 pF (unless otherwise noted)

PARAMETER		TEST CONDITIONS	TO (OUTPUT)	MIN	MAX	UNIT
f_clock	Clock frequency, OCLKA⁽¹⁾		OCLKA	0.787	50	MHz
t_C	Cycle Time, OCLKA		OCLKA	20	1270.6	ns
t_W(H)	Pulse Duration, high⁽²⁾	50% to 50% reference points (signal)	OCLKA	(t_C/2_-2)		ns
t_W(L)	Pulse Duration, low⁽²⁾	50% to 50% reference points (signal)	OCLKA	(t_C/2_-2)		ns
	Jitter		OCLKA		350	ps
f_clock	Clock frequency, OCLKB⁽¹⁾		OCLKB	0.787	50	MHz
t_C	Cycle Time, OCLKB		OCLKB	20	1270.6	ns
t_W(H)	Pulse Duration, high⁽²⁾	50% to 50% reference points (signal)	OCLKB	(t_C/2_-2)		ns
t_W(L)	Pulse Duration, low⁽²⁾	50% to 50% reference points (signal)	OCLKB	(t_C/2_-2)		ns
	Jitter		OCLKB		350	ps
f_clock	Clock frequency, OCLKC⁽¹⁾		OCLKC	0.787	50	MHz
t_C	Cycle Time, OCLKC⁽²⁾		OCLKC	20	1270.6	ns
t_W(H)	Pulse Duration, high	50% to 50% reference points (signal)	OCLKC	(t_C/2_-2)		ns
t_W(L)	Pulse Duration, low⁽²⁾	50% to 50% reference points (signal)	OCLKC	(t_C/2_-2)		ns
	Jitter		OCLKC		350	ps

(1) The frequency of OCLKA thru OCLKC is programmable.

(2) The Duty Cycle of OCLKA thru OCLKC is within +/- 2 ns of 50%.